Data transmission method, timing controller, and storage medium

A timing controller, comprising a processor, a transceiver, and a memory;

• wherein the memory stores one or more instructions executable by the processor;
• and
• the processor, when loading and running the one or more instructions, is caused to control the transceiver to perform:
• sending clock calibration data to a source driver chip, wherein the clock calibration data instructs the source driver chip to perform a clock calibration;
• successively sending, in response to completing the clock calibration by the source driver chip, a first identification code and an initialization control instruction to the source driver chip over a data channel, wherein the first identification code indicates a start of transmission of the initialization control instruction, and the initialization control instruction comprises configuration information, the configuration information instructing the source driver chip to perform a configuration on a physical layer parameter;
• and
• successively sending a link stable pattern and display data to the source driver chip.

A non-transitory computer-readable storage medium, storing one or more computer programs, wherein the one or more computer programs, when loaded and executed by a computer, cause the computer to perform:

• sending clock calibration data to a source driver chip, wherein the clock calibration data instructs the source driver chip to perform a clock calibration;
• successively sending, in response to completing the clock calibration by the source driver chip, a first identification code and an initialization control instruction to the source driver chip over a data channel, wherein the first identification code indicates a start of transmission of the initialization control instruction, and the initialization control instruction comprises configuration information, the configuration information instructing the source driver chip to perform a configuration on a physical layer parameter;
• and
• successively sending a link stable pattern and display data to the source driver chip.