Interprocessor procedure calls
AssigneeSophos Limited
InventorDirk Jacobus van der Merwe
Life of this patent
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Abstract
A firewall host uses a shared memory to pass arguments to, and receive results from, a remote procedure executing on a locally coupled network processing unit that offloads processing for the firewall.
Claims23
A computer program product for executing an interprocessor procedure call between two processors coupled by a local hardware bus, the computer program product comprising non-transitory computer executable code embodied in a computer readable medium that, when executing on one or more computing devices, performs the steps of:
- storing one or more arguments for the interprocessor procedure call in a first memory of a first kernel of a first processor;
- storing a descriptor for the interprocessor procedure call to a ring buffer in the first memory, the descriptor including an identifier for a procedure requested in the interprocessor procedure call and a location for the one or more arguments in the first memory;
- reading the descriptor from the first memory to a second memory of a second kernel of a second processor coupled to the first processor over the local hardware bus;
- sending an interrupt from the first processor to the second processor, the interrupt indicating a request for execution of the interprocessor procedure call;
- in response to receiving the interrupt at the second processor, processing the descriptor with the second processor, wherein processing the descriptor includes copying the one or more arguments from the location in the descriptor to the second memory of the second processor;
- processing the one or more arguments in the second kernel of the second processor using the procedure specified by the indicator;
- and
- writing a response to the interprocessor procedure call from the second processor to the location in the first memory of the first processor, the response including a first instance of a unique value at a first position in the response allocated to identifying a code for signaling a completion of the procedure and a second instance of the unique value at a second position in the response allocated to signaling the completion of the procedure.
A method for executing an interprocessor procedure call between two processors coupled by a hardware bus, the method comprising:
- storing one or more arguments for the interprocessor procedure call in a first memory of a first kernel of a first processor;
- storing a descriptor for the interprocessor procedure call to the first memory, the descriptor including an identifier for a procedure requested in the interprocessor procedure call and a location for the one or more arguments in the first memory;
- reading the descriptor from the first memory to a second memory of a second processor coupled to the first processor through the hardware bus;
- sending an interrupt from the first processor to the second processor, the interrupt indicating a request for execution of the interprocessor procedure call;
- in response to receiving the interrupt at the second processor, copying the one or more arguments from the location of the first memory in the descriptor to the second memory of the second processor and processing the one or more arguments in a second kernel of the second processor using the procedure specified by the indicator;
- and
- writing a response to the interprocessor procedure call from the second processor to the first memory of the first processor.
A system comprising:
- a first processor including a first kernel with a first memory accessible to external resources, the first processor executing a client configured to request a procedure from a remote processor with an interprocessor procedure call;
- a second processor including a second kernel with a second memory, the second processor hosting a server for the interprocessor procedure call;
- and
- a hardware bus locally coupling the first processor and the second processor in a communicating relationship, wherein the first processor stores arguments for the interprocessor procedure call in the first memory and signals a request for the interprocessor procedure call with a hardware interrupt from the first processor to the second processor over the hardware bus, and further wherein the second processor is configured to read the arguments from the first memory of the second processor, to process the arguments according to the procedure, and to write a response to the interprocessor procedure call to the first memory of the first processor.
Dependencies are inferred from the claim text.