Multiplier-accumulator processing pipelines and processing component, and methods of operating same

A processing system comprising:

• a plurality of processing components, wherein each processing component includes:
• first memory to store image data;
• a plurality of multiplier-accumulator execution pipelines, coupled to the first memory, wherein each multiplier-accumulator execution pipeline includes a plurality of multiplier-accumulator circuits configurable to perform multiply and accumulate operations using data from the first memory and the filter weights;
• wherein:
• a first processing component of the plurality of processing components is configurable to process all of the data associated with all stages of a first image frame via the plurality of multiplier-accumulator execution pipelines of the first processing component, and
• a second processing component of the plurality of processing components is configurable to process all of the data associated with all stages of a second image frame via the plurality of multiplier-accumulator execution pipelines of the second processing component, wherein the first processing component processes the data associated with the stages of the first image frame concurrently with respect to the second processing component processing the data associated with the stages of the second image frame and wherein the first image frame and the second image frame are successive image frames;
• and
• wherein the first processing component is separate from the second processing component and the first and second processing components are electrically connected.

A processing system comprising:

• a plurality of processing components, wherein each processing component includes:
• first memory to store image data;
• a plurality of multiplier-accumulator execution pipelines, coupled to the first memory, wherein each multiplier-accumulator execution pipeline includes a plurality of multiplier-accumulator circuits configurable to perform multiply and accumulate operations using data from the first memory and filter weights;
• wherein:
• a first processing component of the plurality of processing components is configurable to process all of the data associated with a first subset of stages of a first image frame via the plurality of multiplier-accumulator execution pipelines of the first processing component, and
• a second processing component of the plurality of processing components is configurable to process all of the data associated with a second subset of stages of the first image frame via the plurality of multiplier-accumulator execution pipelines of the second processing component, wherein the first processing component processes the data associated with the first subset of stages of the first image frame concurrently with respect to the second processing component processing the data associated with the second subset of stages of a first image frame;
• and
• wherein the first processing component is separate from the second processing component and the first and second processing components are electrically connected.

A processing stem comprising:

• one or more processing components, wherein each processing component includes:
• first memory to store image data;
• a plurality of multiplier-accumulator execution pipelines, coupled to the first memory, wherein each multiplier-accumulator execution pipeline includes a plurality of multiplier-accumulator circuits configurable to perform multiply and accumulate operations, wherein the plurality of multiplier-accumulator execution pipelines includes:
• a first multiplier-accumulator execution pipeline configurable to:
• (i) input first data, (ii) perform a first plurality of multiply and accumulate operations using the first data and a first set of filter weights, and (iii) output first processed data to the first memory, wherein the first processed data are stored therein, and
• a second multiplier-accumulator execution pipeline configurable to:
• (i) input second data from the first memory, wherein the second data includes the first processed data, (ii) perform a second plurality of multiply and accumulate operations using the second data and a second set of filter weights, and (iii) output second processed data;
• wherein:
• the first multiplier-accumulator execution pipeline is configurable to perform a portion of the first plurality of multiply and accumulate operations concurrently with respect to performance of the second plurality of multiply and accumulate operations by the second multiplier-accumulator execution pipeline, and
• the first multiplier-accumulator execution pipeline is configurable to (i) output a first portion of the first processed data to the first memory before the second multiplier-accumulator execution pipeline inputs second data from the first memory and (ii) output a second portion of the first processed data to the first memory while the second multiplier-accumulator execution pipeline inputs second data from the first memory.