US 11,960,885 B2Granted

Seamless place and route for heterogenous network of processor cores

AssigneeTenstorrent Inc.

InventorsJasmina Vasiljevic, Ljubisa Bajic, Davor Capalija, Stanislav Sokorac

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Abstract

Methods and systems related to parallel computing using heterogeneous networks of computational nodes are disclosed herein. A method for executing a complex computation on a heterogeneous set of computational nodes linked together by a set of links in a network is disclosed. The method includes compiling, using a table of bandwidth values for the set of links in the network, a set of instructions for routing data for the execution of the complex computation. The method also includes configuring a set of programmable controllers on the heterogeneous set of computational nodes with the set of instructions. The method also includes executing the set of instructions using the set of programmable controllers. The method also includes routing data through the network to facilitate the execution of the complex computation by the heterogeneous set of computational nodes and in response to the execution of the instructions.

Claims17

Dependent claims

A method, for executing a complex computation on a heterogeneous set of computational nodes linked together by a set of links in a network, comprising:

compiling, using a table of bandwidth values for the set of links in the network, a set of instructions for routing data for an execution of the complex computation;
configuring a set of programmable controllers on the heterogeneous set of computational nodes with the set of instructions;
executing the set of instructions using the set of programmable controllers;
and
routing the data:
(i) through the network;
(ii) to facilitate the execution of the complex computation by the heterogeneous set of computational nodes;
and (iii) in response to the execution of the set of instructions;
wherein:
(i) the heterogeneous set of computational nodes includes a set of processing cores in at least two multicore processors;
(ii) the network includes a network hierarchy with at least a core level and a chip level;
(iii) each computational node in the heterogeneous set of computational nodes includes a router from a set of routers;
(iv) the routing of the data through the network includes the set of routers transitioning the data through the core level and the chip level;
(v) the network hierarchy includes a server level and a rack level;
(vi) at least one of the links is an ethernet link;
(vii) the routing of the data through the network includes the set of routers transiting the data through the server level and the rack level;
and (viii) the ethernet link does not use an ethernet switch.

14 more elements

A method for executing a complex computation on a heterogeneous set of computational nodes linked together by a set of links in a network comprising:

compiling, using a machine model of the set of links, a set of instructions for routing data for an execution of the complex computation, wherein the machine model includes a bandwidth for each link in the set of links in the network;
configuring a set of programmable controllers on the heterogeneous set of computational nodes with the set of instructions;
executing the set of instructions using the set of programmable controllers;
and
routing data:
(i) through the network;
(ii) to facilitate the execution of the complex computation by the heterogeneous set of computational nodes;
and (iii) in response to the execution of the set of instructions;
wherein:
(i) the network includes a network hierarchy with at least a core level and a chip level;
(ii) each computational node in the heterogeneous set of computational nodes includes a router from a set of routers;
(iii) the routing of the data through the network includes the set of routers transitioning the data through the core level and the chip level;
(iv) the network hierarchy includes a server level and a rack level;
(v) at least one of the links is an ethernet link;
(vi) the routing of the data through the network includes the set of routers transiting the data through the server level and the rack level;
and (vii) the ethernet link does not require an ethernet switch.

13 more elements

Dependencies are inferred from the claim text.

Facts

Application: 17/717,769Filed 11 Apr 2022
Published: US 2023/0325183 A112 Oct 2023
Granted: 16 Apr 2024
Term ends: Not estimatedThe source records don’t support an estimate.

Classification8 codes

G06F 9/3001
To perform operations on data operands: arithmetic instructions
G06F 9/3889
Using a plurality of independent parallel functional units: controlled by multiple instructions, e.g. MIMD, decoupled access or execute
G06F 8/451
Exploiting coarse grain parallelism in compilation, i.e. parallelism between groups of instructions: code distribution
G06F 8/453
Exploiting coarse grain parallelism in compilation, i.e. parallelism between groups of instructions: data distribution