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US 11,960,810 B2Granted
Chip, layout design system, and layout design method
AssigneeRealtek Semiconductor Corp.
InventorLien-Hsiang Sung
Life of this patent
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Abstract
A chip includes a first circuitry and a second circuitry. The first circuitry includes first circuits which have first power consumption at a point of time. The second circuitry includes second circuits which have second power consumption at the point of time, and the first power consumption is higher than the second power consumption. At least one of the first circuits and at least one the second circuits are alternately arranged, in order to lower an operating temperature of the plurality of first circuits at the point of time.
Claims14
A layout design system, comprising:
- at least one memory circuit configured to store at least one program code, a temperature threshold value, and application data;
- and
- at least one processor circuit configured to perform the at least one program code to:
- select a plurality of first layout patterns and a plurality of second layout patterns according to the application data, wherein the plurality of first layout patterns correspond to a plurality of first circuits in a first circuitry, and the plurality of second layout patterns correspond to a plurality of second circuits in a second circuitry;
- alternately arrange at least one of the plurality of first layout patterns and at least one of the plurality of second layout patterns, in order to generate first layout data corresponding to a chip;
- determine whether an operating temperature of the chip is lower than the temperature threshold value according to the first layout data;
- and
- if the operating temperature is lower than the temperature threshold value, output the first layout data, in order to fabricate the chip according to the first layout data.
5 more elements
A layout design method, comprising:
- selecting a plurality of first layout patterns and a plurality of second layout patterns according to application data, wherein the plurality of first layout patterns correspond to a plurality of first circuits in a first circuitry, and the plurality of second layout patterns correspond to a plurality of second circuits in a second circuitry;
- alternately arranging at least one of the plurality of first layout patterns and at least one of the plurality of second layout patterns, in order to generate first layout data corresponding to a chip;
- determining whether an operating temperature of the chip is lower than a temperature threshold value according to the first layout data;
- and
- if the operating temperature is lower than the temperature threshold value, outputting the first layout data, in order to fabricate the chip according to the first layout data.
2 more elements
Dependencies are inferred from the claim text.