Method for managing memory buffer and memory control circuit unit and memory storage apparatus thereof
AssigneePhison Electronics Corp.
InventorsPo-Wen Hsiao, Chun Hao Lin
Life of this patent
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AssigneePhison Electronics Corp.
InventorsPo-Wen Hsiao, Chun Hao Lin
Estimating the term…
A method for managing a memory buffer, a memory control circuit unit, and a memory storage apparatus are provided. The method includes the following steps. Multiple consecutive first commands are received from a host system. A command ratio of read command among the first commands is calculated. The memory storage apparatus is being configured in a first mode or a second mode according to the command ratio and a ratio threshold. A first buffer is configured in a buffer memory to temporarily store a logical-to-physical address mapping table in response to the memory storage device being configured in the first mode, in which the first buffer has a first capacity. A second buffer is configured in the buffer memory in response to the memory storage device being configured in the second mode, in which the second buffer has a second capacity, which is greater than the first capacity.
A method for managing a memory buffer, applicable to a memory storage apparatus, wherein the memory storage apparatus comprises a rewriteable non-volatile memory module and a buffer memory, and the rewrite able non-volatile memory module stores a plurality of logical-to-physical address mapping tables, the method comprising:
A memory control circuit unit, configured to control a memory storage apparatus, wherein the memory storage apparatus comprises a rewriteable non-volatile memory module, the rewriteable non-volatile memory module stores a plurality of logical-to-physical address mapping tables, the memory control circuit unit comprising:
A memory storage apparatus, comprising:
Dependencies are inferred from the claim text.