Memory controller and method of operating the same

A method of operating a memory controller including a plurality of control cores for individually controlling a plurality of memory devices, the method comprising:

• allocating write requests received from a host to each of the plurality of control cores based on predefined criteria;
• storing, in a shared memory in response to occurrence of a sudden power-off, dump information including information about logical addresses corresponding to the write requests;
• and
• storing, in a memory device controlled by a first control core, the dump information of a second control core associated with the first control core in response to occurrence of the sudden power-off, the first and second control cores being among the plurality of control cores.

A memory controller, comprising:

• a plurality of control cores configured to individually control a plurality of memory devices;
• a host core configured to allocate write requests received from a host to each of the plurality of control cores based on predefined criteria;
• and
• a shared memory configured to be accessed by the host core and the plurality of control cores,
• wherein, in response to occurrence of a sudden power-off,
• the host core stores dump information including information about logical addresses corresponding to the write requests in the shared memory, and
• each of the plurality of control cores stores data corresponding to allocated write requests and dump information of paired control cores respectively associated with the plurality of control cores in the plurality of memory devices.