Method and system for managing memory associated with a peripheral component interconnect express (PCIE) solid-state drive (SSD)

A memory controller for managing a memory associated with a Peripheral Component Interconnect Express (PCIe) Solid-State Drive (SSD), comprising:

• a processor configured to:
• generate a plurality of memory pools of equal size from a predefined size of contiguous physical memory associated with the PCIe SSD, wherein each of the plurality of memory pools manages a memory request of a different size, and wherein each of the plurality of memory pools is associated with a respective predefined size of memory request;
• divide each of the plurality of memory pools into a first set of memory pages, wherein each of the first set of memory pages is of a size equal to a maximum size among the predefined size of the memory request associated with the respective memory pool;
• divide each of the first set of memory pages into a second set of memory pages, wherein each of the second set of memory pages is of a size equal to the predefined size of the memory request associated with respective memory pool;
• and
• manage the contiguous physical memory associated with the PCIe SSD by allocating at least one memory page from the second set of memory pages for a memory request of a size corresponding to the size of the second set of memory pages.

A method for managing a memory associated with a Peripheral Component Interconnect Express (PCIe) Solid-State Drive (SSD), the method comprising:

• generating a plurality of memory pools from a memory, wherein each of the memory pools has the same size;
• dividing each of the memory pools into a first set of memory pages, wherein each memory page of the first set of memory pages has a size equal to a maximum size of a memory request for the all of the memory pools;
• dividing each memory page of the first set of memory pages into a second set of memory pages, wherein each memory page of the second set of memory pages has a size equal to a size of a memory request associated with its respective memory pool;
• and
• allocating at least one memory page from the second set of memory pages in response to a read/write operation having a size corresponding to the size of the second set of memory pages.