Variable execution time atomic operations
AssigneeMicron Technology, Inc.
InventorsDean E. Walker, Tony M. Brewer
Life of this patent
Estimating the term…
Abstract
System and techniques for variable execution time atomic operations are described herein. When an atomic operation for a memory device is received, the run length of the operation is measured. If the run length is beyond a threshold, a cache line for the operation is locked while the operation runs. A result of the operation is queued until it can be written to the cache line. At that point, the cache line is unlocked.
Claims24
An apparatus for variable execution time atomic operations, the apparatus comprising:
- a cache including a cache line;
- and
- processing circuitry configured to:
- receive an atomic operation that corresponds to an operation to be performed on memory in the apparatus;
- detect that a run length of the atomic operation beyond a threshold;
- lock the cache line for the memory in response to detecting that the run length is beyond the threshold;
- enqueue a result of the atomic operation in a results queue;
- write the cache line with the result in response to dequeuing the result from the results queue;
- and
- unlock the cache line in response to writing the cache line with the result.
A method for variable execution time atomic operations, the method comprising:
- receiving an atomic operation at a memory device, the atomic operation corresponding to an operation to be performed on memory in the memory device;
- detecting that a run length of the atomic operation beyond a threshold;
- locking a cache line for the memory in response to detecting that the run length is beyond the threshold;
- enqueueing a result of the atomic operation in a results queue;
- writing the cache line with the result in response to dequeuing the result from the results queue;
- and
- unlocking the cache line in response to writing the cache line with the result.
A non-transitory machine readable medium including instructions for variable execution time atomic operations, the instructions, when executed by processing circuitry cause the processing circuitry to perform operations comprising:
- receiving an atomic operation at a memory device, the atomic operation corresponding to an operation to be performed on memory in the memory device;
- detecting that a run length of the atomic operation beyond a threshold;
- locking a cache line for the memory in response to detecting that the run length is beyond the threshold;
- enqueueing a result of the atomic operation in a results queue;
- writing the cache line with the result in response to dequeuing the result from the results queue;
- and
- unlocking the cache line in response to writing the cache line with the result.
Dependencies are inferred from the claim text.