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US 11,960,355 B2Granted
Memory system
AssigneeKioxia Corporation
InventorsMasayoshi Sato, Kenichiro Suzuki
Life of this patent
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Abstract
According to one embodiment, a memory system includes a first memory, an interface circuit, and a processor. The interface circuit is configured to receive a first request from an external device. The processor is configured to select a mode among a plurality of modes in response to the first request, and perform, on data read from the first memory, error correction of the selected mode.
Claims14
A memory system comprising:
- a first memory;
- an interface circuit configured to receive a first command from an external device, device and receive a second command from the external device after receiving the first command, the first command including information including of a time limit of an error correction to be executed in the memory system, the second command specifying to read data from the first memory;
- and
- a processor circuitry configured to:
- select a mode among a first plurality of modes of error correction based on the time limit included in the received first command, the first plurality of modes of error correction being a plurality of kinds of error correction which the memory system is capable of performing;
- read the data from the first memory after receiving the second command;
- perform, on the read data, an error correction corresponding to the selected mode;
- and
- send a response including unrecovered error to the external device based on a failure of the error correction on the read data.
6 more elements
A method for controlling a memory system which includes a first memory, the method comprising:
- receiving a first command from an external device and receiving a second command from the external device after receiving the first command, the first command including information of a time limit of an error correction to be executed in the memory system, the second command specifying to read data from the first memory;
- selecting a mode among a first plurality of modes of error correction based on the time limit included in the received first command, the first plurality of modes of error correction being a plurality of kinds of error correction which the memory system is capable of performing;
- reading the data from the first memory after receiving the second command;
- performing, on the read data, an error correction corresponding to the selected mode;
- and
- sending a response including unrecovered error to the external device based on a failure of the error correction on the read data.
3 more elements
Dependencies are inferred from the claim text.