Addressable test chip test system
AssigneeSemitronix Corporation
InventorsJiabai Cheng, Wei Chen, Ludan Yang, Fan Lan
Life of this patent
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Abstract
A test apparatus for testing electrical parameters of a target chip includes: a function generator; a switch matrix module; a plurality of source measurement units (SMUs); at least one of the SMUs is configured to provide power supply for the target chip; at least one of the SMUs is coupled to the switch matrix module; and at least two of said SMUs are test SMUs coupled to ports of the target chip and the function generator.
Claims20
A test system comprising:
- a probe card;
- a test apparatus;
- and
- a test path coupling an addressable test chip with the test apparatus through the probe card;
- and said address register is integrated in one of said probe card or the addressable test chip;
- wherein:
- the test apparatus includes a function generator, a source measurement unit, and a programmable logic device;
- the programmable logic device is configured to acquire the trigger signal of the test algorithm and transmits it to the function generator and the source measurement unit, synchronously triggers the function generator and the source measurement unit to generate CLK signals and DF signals respectively;
- the address register connected to the function generator switches addresses according to the CLK signal;
- the source measurement unit continuously samples according to the DF signal triggered synchronously;
- and
- each address corresponds to multiple sampling data.
A test system comprising a function generator, source measurement units, a programmable logic device, a synchronous trigger module, and a clock module;
- the programmable logic device obtains the trigger signal of the test algorithm and transmits it to the synchronous trigger module, the synchronous trigger module controls the function generator and the clock module to synchronously generate clock signals of different frequencies;
- the address register connected to the function generator switches the address according to the address register connected to the function generator switches the address according to the transformation of the waveform in the clock signal;
- and the clock signal of the clock module is transmitted to the source measurement units to generate the synchronous trigger DF signal and conduct continuous sampling, each address corresponds to one or more sampling data, and continuous sampling, with each address corresponding to multiple sampling data.
Dependencies are inferred from the claim text.