Burn in board test device and system
AssigneeSamsung Electronics Co., Ltd.
InventorSeong Seob Shin
Life of this patent
Estimating the term…
Abstract
A burn in board test device including: a plurality of devices under test, wherein each of the devices under test includes a burn in device; a plurality of resistors connected to each of the plurality of devices under test; a plurality of device under test switches connected to each of the plurality of resistors; and a device under test tester which is connected a plurality of sub input/output (I/O) channels connected to each of the plurality of device under test switches, and a main I/O channel for connecting the plurality of sub I/O channels to each other to test the plurality of devices under test.
Claims20
A burn in board test system, comprisina:
- a clock generator which generates a clock;
- a plurality of devices under test, wherein each of the devices under test includes a burn in device and including a first device under test and a second device under test;
- a plurality of clock switches which transmits the clock to the plurality of devices under test and including a first clock switch directly connected to the first device under test and a second clock switch directly connected to the second device under test;
- a plurality of resistors connected to each of the plurality of devices under test;
- a plurality of device under test switches connected to each of the plurality of resistors;
- and
- a device under test tester which is connected to a plurality of Rib input/output (I/O) channels connected to each of the plurality of device under test switches, and a main I/O channel for connecting the plurality of sub I/O channels to each other to test the plurality of devices under test.
A bum in board test system, comprising:
- a clock generator which generates a clock;
- a Device Under Test (DUT) tester connected to a plurality of devices under test through a first channel to test the plurality of devices under test;
- a plurality of clock switches which transmit the clock to the plurality of devices under test and including a first clock switch and a second clock switch;
- a plurality of DUT switches connected between the plurality of devices under test and the DUT tester;
- and
- a plurality of resistors connected between the plurality of devices under test and the DUT tester,
- wherein the plurality of devices under test include a first device under test directly connected to the first clock switch and a second device under test directly connected to the second dock switch,
- Wherein a first DUT switch of the plurality of DUT switches connected to the first device under test shorts a sub channel connecting the first device under test to the first channel when the first device under test is tested.
A burn in board test system, comprising:
- a clock generator which generates a clock;
- a plurality of clock switches which transmits the clock;
- and
- a burn in board test device which operates by the clock,
- wherein the burn in board test device includes
- a plurality of devices under test arranged in a first direction, and a second. direction intersecting the first direction,
- a plurality of device under test testers which tests the plurality of devices under test arranged side by side in the first direction, among the plurality of devices under test,
- a plurality of resistors and a plurality of device under test switches disposed between the plurality of device under test testers and the plurality of devices under test.
Dependencies are inferred from the claim text.