Etch barrier for microelectronic packaging conductive structures
AssigneeIntel Corporation
InventorsKristof Darmawikarta, Srinivas V. Pietambaram, Hongxia Feng, Xiaoying Guo, Benjamin T. Duong
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AssigneeIntel Corporation
InventorsKristof Darmawikarta, Srinivas V. Pietambaram, Hongxia Feng, Xiaoying Guo, Benjamin T. Duong
Estimating the term…
Conductive structures in a microelectronic package and having a surface roughness of 50 nm or less are described. This surface roughness is from 2 to 4 times less than can be found in packages with conductive structures (e.g., traces) formed using alternative techniques. This reduced surface roughness has a number of benefits, which in some cases includes a reduction of insertion loss and improves a signal to noise ratio for high frequency computing applications. The reduced surface roughness can be accomplished by protecting the conductive structure r during etch processes and applying an adhesion promoting layer to the conductive structure.
An integrated circuit package comprising:
An integrated circuit package comprising:
An integrated circuit package substrate comprising:
Dependencies are inferred from the claim text.