Packet routing between memory devices and related apparatuses, methods, and memory systems

A method of routing a received packet, the method comprising:

• at a semiconductor memory device configured to carry multiple first stacked memory dies and including a switch, a first memory interface, and a second memory interface,
• receiving, at the first memory interface over a first memory link, the received packet including a destination identifier indicating a destination of the received packet;
• determining whether the destination identifier matches an identifier associated with the semiconductor memory device or one of other identifiers associated with one of other semiconductor memory devices configured to carry multiple second stacked memory dies;
• processing the received packet at the semiconductor memory device responsive to a determination that the destination identifier matches the identifier associated with the semiconductor memory device;
• and
• passing the received packet, via the switch through the second memory interface over a second memory link, toward the one of the other semiconductor memory devices associated with the one of the other identifiers that matches the destination identifier.

A memory system, comprising:

• a first semiconductor memory device configured to carry multiple first stacked memory dies for storing data, the first semiconductor memory device having a first identifier associated therewith;
• a second semiconductor memory device configured to carry multiple second stacked memory dies for storing data, the second semiconductor memory device having a second identifier associated therewith, the second semiconductor memory device electrically connected to the first semiconductor memory device for communication via one or more first memory links;
• and
• a third semiconductor memory device configured to carry multiple third stacked memory dies for storing data, the third semiconductor memory device having a third identifier associated therewith, the third semiconductor memory device electrically connected to the second semiconductor memory device for communication via one or more second memory links;
• the second semiconductor memory device including a switch and configured to:
• route, via the switch, received packets indicating the first identifier to the first semiconductor memory device over one of the one or more first memory links;
• and
• route, via the switch received packets indicating the third identifier to the third semiconductor memory device over one of the one or more second memory links.