Memory device with failed main bank repair using redundant bank
AssigneeYangtze Memory Technologies Co., Ltd.
InventorQiang Tang
Life of this patent
Estimating the term…
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AssigneeYangtze Memory Technologies Co., Ltd.
InventorQiang Tang
Estimating the term…
In certain aspects, a memory device includes an array of memory cells, an input/output (I/O) circuit, and I/O control logic coupled to the I/O circuit. The array of memory cells includes P groups of banks. P redundant banks are included in and shared by the P groups of banks. The I/O circuit is coupled to the P groups of banks and configured to direct P×N pieces of data to or from P×N working banks, respectively. The I/O control logic is configured to determine the P×N working banks from the P groups of banks based on bank fail information indicative of K failed main banks from the P groups of banks. The P×N working banks include K redundant banks of the P redundant banks. The I/O control logic is also configured to control the I/O circuit to direct P×N pieces of data to or from the P×N working banks, respectively.
A memory device, comprising:
A system, comprising:
A method for operating a memory device comprising an array of memory cells, the array of memory cells comprising P groups of banks, where P is a positive integer, the method comprising:
Dependencies are inferred from the claim text.