Method and system for providing wireless FPGA programming download via a wireless communication block

A system network configured to provide information processing and transmission comprising:

• a wireless network able to provide communication between devices via radio frequencies;
• a digital processing device coupled to the wireless network and having a semiconductor die wherein the semiconductor die is designated a first portion of the die containing a field programmable gate array (“FPGA”) for performing user defined logic function, a second portion of the die including a configurable wireless communication block (“WCB”) containing a built-in wireless transceiver and a third portion of the die containing a configuration download block (“CDB”) for initiating a configuration process, wherein the FPGA includes multiple configurable logic blocks (“LBs”) for being selectively programmable to perform user defined logic functions and a routing fabric configured to selectively route information between the configurable LBs and input/output ports based on routing configuration signals;
• and
• a portable device coupled to the wireless network and configured to upload configuration data from the portable device to the FPGA via the built-in wireless transceiver of the configurable WCB through the wireless network.

A method of wireless accessing a field programmable gate array (“FPGA”) die containing a wireless communication block (“WCB”) comprising:

• initiating a wireless communication request sending from a portable device to a WCB of FPGA die in a digital processing device via a wireless network;
• receiving an authentication from the WCB to the portable device granting the wireless communication request after a process of authentication verified by the WCB via the wireless network;
• sending a bitstream containing configuration data from the portable device to a configurable download block (“CDB”) of FPGA die via the WCB through the wireless network for configuring logic blocks of the FPGA die;
• and
• programming multiple configurable logic blocks (“LBs”) for performing user defined logic functions and a routing fabric for selectively routing information between the configurable LBs and input/output ports based on routing configuration signals.