# US 11,910,733 B2 · Generating self-aligned heater for PCRAM using filaments

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- Number: US 11,910,733 B2
- Document ID: US11910733B2
- Status: Granted
- Kind: B2
- Application number: 17/813,802
- Filed: 2022-07-20
- Published: 2022-11-17
- Granted: 2024-02-20
- Earliest claimed: 2020-02-11
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Co., Ltd.
- Inventors: Sheng-Chih Lai
- Web page: https://patentgrep.com/patent/US11910733B2

## CPC

- H10N 70/231: {based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect}
- G11C 13/0004: {comprising amorphous/crystalline phase transition cells}
- G11C 13/0011: {comprising conductive bridging RAM [CBRAM] or programming metallization cells [PMCs]}
- G11C 13/003: {Cell access}
- H10B 63/30: {comprising selection components having three or more electrodes, e.g. transistors}
- H10N 70/021: {Formation of switching materials, e.g. deposition of layers}
- H10N 70/826: {adapted for essentially vertical current flow, e.g. sandwich or pillar type devices}
- H10N 70/841: {Electrodes}
- H10N 70/882: {Compounds of sulfur, selenium or tellurium, e.g. chalcogenides}
- H10N 70/8828: {Tellurides, e.g. GeSbTe}
- H10N 70/8833: {Binary metal oxides, e.g. TaOx}
- G11C 13/004: {Reading or sensing circuits or methods}
- G11C 13/0069: {Writing or programming circuits or methods}
- H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- G11C: STATIC STORES (semiconductor memory devices H10B)
- H10B: ELECTRONIC MEMORY DEVICES

## Abstract

A method includes forming a bottom electrode, forming a dielectric layer, forming a Phase-Change Random Access Memory (PCRAM) region in contact with the dielectric layer, and forming a top electrode. The dielectric layer and the PCRAM region are between the bottom electrode and the top electrode. A filament is formed in the dielectric layer. The filament is in contact with the dielectric layer.

## Claims

### Claim 1

A method comprising:
forming a plurality of bottom electrodes;
forming a first dielectric layer, wherein the first dielectric layer continuously extends to regions directly over the plurality of bottom electrodes, and wherein an entirety of the first dielectric layer is formed of a homogeneous material;
forming a plurality of Phase-Change Random Access Memory (PCRAM) regions, each being in contact with a surface of the first dielectric layer that is formed of the homogeneous material;
forming a plurality of top electrodes over and electrically connected to the plurality of PCRAM regions; and
forming a plurality of filaments in the first dielectric layer, wherein the plurality of filaments are in contact with the plurality of PCRAM regions.

### Claim 2 (depends on 1)

The method of claim 1, wherein the plurality of filaments form an array, and wherein each of the plurality of PCRAM regions is in contact with one of the plurality of filaments.

### Claim 3 (depends on 1)

The method of claim 1, wherein the plurality of bottom electrodes are in a second dielectric layer, and wherein top surfaces of the plurality of bottom electrodes are coplanar with a top surface of the second dielectric layer.

### Claim 4 (depends on 1)

The method of claim 1, wherein at a time after the plurality of filaments have been formed, the first dielectric layer remains to be a homogeneous layer comprising the homogeneous material that extends to and contacts the plurality of filaments.

### Claim 5 (depends on 1)

The method of claim 1, wherein the forming the plurality of filaments comprises:
selecting a first PCRAM region in the plurality of PCRAM regions;
forming a first filament connecting to the first PCRAM region;
after the first filament is formed, selecting a second PCRAM region in the plurality of PCRAM regions; and
forming a second filament connecting to the second PCRAM region, wherein the first filament and the second filament are comprised in separate Resistive Random-Access Memory (ReRAM) cells.

### Claim 6 (depends on 1)

The method of claim 1, wherein the forming the plurality of filaments comprises applying currents passing through each of the plurality of PCRAM regions.

### Claim 7 (depends on 1)

The method of claim 1 further comprising writing a PCRAM region in the plurality of PCRAM regions or reading a status of the PCRAM region by conducting a current through the PCRAM region.

### Claim 8 (depends on 1)

The method of claim 1, wherein the forming the first dielectric layer comprises depositing a material selected from the group consisting of HfOx, ZrOx, TaOx, TiOx, VOx, NiOx, NbOx, LaOx, and combinations thereof.

### Claim 9 (depends on 1)

The method of claim 1 further comprising, before the plurality of filaments are formed, patterning the first dielectric layer into an array of dielectric regions.

### Claim 10 (depends on 1)

The method of claim 1, wherein at a time after the plurality of filaments are formed, the first dielectric layer is a continuous dielectric layer continuously extending to each of the plurality of PCRAM regions.

### Claim 11

A method comprising:
forming a plurality of bottom electrodes in a first dielectric layer;
forming a second dielectric layer over and contacting the plurality of bottom electrodes and the first dielectric layer;
forming a Phase-Change Random Access Memory (PCRAM) layer over a top surface of the second dielectric layer;
patterning the PCRAM layer in an etching process to form a plurality of PCRAM elements, wherein the etching process is performed using the second dielectric layer as an etch stop layer; and
forming a plurality of filaments in the second dielectric layer, wherein the plurality of filaments are formed sequentially, and wherein the plurality of filaments belong to different Resistive Random-Access Memory (ReRAM) cells.

### Claim 12 (depends on 11)

The method of claim 11, wherein the plurality of filaments are formed by applying electrical fields in the second dielectric layer.

### Claim 13 (depends on 11)

The method of claim 11, wherein the first dielectric layer continuously extends directly underlying, and in physical contact with, all of the plurality of PCRAM elements.

### Claim 14 (depends on 11)

The method of claim 11, wherein the PCRAM layer comprises a chalcogenide semiconductor material.

### Claim 15 (depends on 11)

The method of claim 11, wherein the forming the second dielectric layer comprises depositing a metal oxide.

### Claim 16 (depends on 11)

The method of claim 11, wherein the forming the second dielectric layer comprises depositing a high-k dielectric material.

### Claim 17

A method comprising:
forming a plurality of bottom electrodes;
forming a dielectric layer over and contacting the plurality of bottom electrodes;
forming a Phase-Change Random Access Memory (PCRAM) layer over the dielectric layer;
patterning the PCRAM layer to form a plurality of PCRAM elements; and
forming a plurality of top electrodes over the plurality of PCRAM elements, wherein the plurality of PCRAM elements are electrically and physically separated from either the plurality of bottom electrodes or the plurality of top electrodes, and wherein at a time after the plurality of top electrodes have been formed, the dielectric layer is a homogeneous layer formed of a homogeneous dielectric material.

### Claim 18 (depends on 17)

The method of claim 17, wherein the patterning the PCRAM layer is performed using the dielectric layer as an etch stop layer.

### Claim 19 (depends on 17)

The method of claim 17, wherein at the time after the plurality of top electrodes have been formed, an entirety of the homogeneous dielectric material is homogeneous.

### Claim 20 (depends on 17)

The method of claim 17 further comprising applying electrical fields in the dielectric layer to form filaments in the dielectric layer.