# US 11,910,643 B1 · Low cost micro OLED structure and method > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,910,643 B1 - Document ID: US11910643B1 - Status: Granted - Kind: B1 - Application number: 17/484,638 - Filed: 2021-09-24 - Granted: 2024-02-20 - Earliest claimed: 2019-02-21 - Assignees: Meta Platforms Technologies, LLC - Applicants: Meta Platforms Technologies, LLC - Inventors: Min Hyuk Choi; Cheonhong Kim; Zhiming Zhuang - Web page: https://patentgrep.com/patent/US11910643B1 ## CPC - G02B 27/0172: {characterised by optical features} - G06F 3/011: {Arrangements for interaction with the human body, e.g. for user immersion in virtual reality (blind teaching G09B21/00)} - G06F 3/147: using display panels - G09G 3/32: semiconductive, e.g. using light-emitting diodes [LED] - G09G 3/3225: using an active matrix - G09G 5/006: {Details of the interface to the display terminal (specific for a display terminal using a CRT G09G1/167; using a flat panel G09G3/2096; circuits for interfacing with colour displays G09G5/04)} - H10D 86/411: {characterised by materials, geometry or structure of the substrates} - H10D 86/60: wherein the TFTs are in active matrices - G02B 2027/0178: {Eyeglass type (eyeglass details G02C)} - G09G 2310/0297: Special arrangements with multiplexing or demultiplexing of display data in the drivers for data electrodes, in a pre-processing circuitry delivering display data to said drivers or in the matrix panel, e.g. multiplexing plural data signals to one D/A converter or demultiplexing the D/A converter output to multiple columns - G09G 2354/00: Aspects of interface with display user - G09G 2370/00: Aspects of data communication - G09G 2370/08: Details of image data interface between the display device controller and the data line driver circuit - H10K 59/12: Active-matrix OLED [AMOLED] displays - H10K 59/1201: {Manufacture or treatment} - G02B: OPTICAL ELEMENTS, SYSTEMS OR APPARATUS - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES ## Abstract A method of manufacturing a display system includes forming a display element having a display active area over a silicon backplane, forming a display driver integrated circuit (DDIC), and bonding the display element to the display driver integrated circuit (DDIC). The display active area may include a light emitting diode such as an organic light emitting diode (OLED). Separately forming the display and the display circuitry may simplify formation of the OLED and allow for a higher density control interface between the display and the DDIC. ## Claims ### Claim 1 A display system comprising: a display element including a display active area disposed over a semiconductor backplane, wherein the display active area comprises a plurality of nodes above a minimum node size formed according to a first process node including a gate driver and a source driver integrated into the semiconductor backplane; a discrete display driver integrated circuit (DDIC) that includes a display package with one or more control circuit elements, wherein the control circuit elements in the display package of the DDIC are formed separately from the semiconductor backplane, — and include a display serial interface configured to provide packet-based video data to the display element, as well as a timing controller configured to receive the packet-based video data, format the video data for input by the source driver, and generate control signals for the gate and source drivers, and wherein the DDIC comprises a plurality of nodes below a maximum node size that were formed according to a second, different process node; and an interconnection component disposed between the display element and the discrete DDIC, wherein the interconnection component communicatively links the control circuit elements in the display package of the DDIC to the display element. ### Claim 2 (depends on 1) The display system of claim 1, wherein a gate line driving circuit is incorporated into the semiconductor backplane of the display element. ### Claim 3 (depends on 2) The display system of claim 2, wherein a data line driving circuit is incorporated into the DDIC. ### Claim 4 (depends on 1) The display system of claim 1, wherein the interconnection component comprises a multiplexer. ### Claim 5 (depends on 1) The display system of claim 1, wherein the semiconductor backplane comprises a silicon backplane. ### Claim 6 (depends on 1) The display system of claim 1, wherein the display element includes a plurality of light emitting diodes (LEDs). ### Claim 7 (depends on 6) The display system of claim 6, wherein the LEDs of the display element comprise organic light emitting diodes (OLEDs). ### Claim 8 (depends on 7) The display system of claim 7, wherein the OLEDs comprise micro-OLEDs. ### Claim 9 (depends on 1) The display system of claim 1, wherein the semiconductor backplane comprises single crystal silicon backplane. ### Claim 10 (depends on 1) The display system of claim 1, wherein the DDIC is formed on a flexible substrate. ### Claim 11 (depends on 1) The display system of claim 1, wherein a plurality of pixel transistors are formed over the semiconductor backplane. ### Claim 12 (depends on 1) The display system of claim 1, wherein the interconnection component that communicatively links the display active area to the DDIC comprises wire bonding. ### Claim 13 (depends on 1) The display system of claim 1, wherein a gate driver is formed over the semiconductor backplane. ### Claim 14 (depends on 1) The display system of claim 1, wherein a source driver is formed within the DDIC. ### Claim 15 An apparatus comprising: a display element including a display active area disposed over a semiconductor backplane, wherein the display active area comprises a plurality of nodes above a minimum node size formed according to a first process node including a gate driver and a source driver integrated into the semiconductor backplane; a discrete display driver integrated circuit (DDIC) that includes a display package with one or more control circuit elements, wherein the control circuit elements in the display package of the DDIC are formed separately from the semiconductor backplane and include a display serial interface configured to provide packet-based video data to the display element, as well as a timing controller configured to receive the packet-based video data, format the video data for input by the source driver, and generate control signals for the gate and source drivers, and wherein the DDIC comprises a plurality of nodes below a maximum node size that were formed according to a second, different process node; and an interconnection component disposed between the display element and the discrete DDIC, wherein the interconnection component communicatively links the control circuit elements in the display package of the DDIC to the display element. ### Claim 16 (depends on 15) The apparatus of claim 15, wherein the display active area comprises a micro-OLED. ### Claim 17 (depends on 15) The apparatus of claim 15, wherein the semiconductor backplane comprises single crystal silicon. ### Claim 18 (depends on 15) The apparatus of claim 15, wherein the DDIC is disposed on a flexible substrate. ### Claim 19 (depends on 15) The apparatus of claim 15, wherein the display active area is electrically connected to the DDIC via a wire bond. ### Claim 20 A method of manufacturing comprising: providing a display element including a display active area disposed over a semiconductor backplane, wherein the display active area comprises a plurality of nodes above a minimum node size formed according to a first process node including a gate driver and a source driver integrated into the semiconductor backplane; providing a discrete display driver integrated circuit (DDIC) that includes a display package with one or more control circuit elements, wherein the control circuit elements in the display package of the DDIC are formed separately from the semiconductor backplane and include a display serial interface configured to provide packet-based video data to the display element, as well as a timing controller configured to receive the packet-based video data, format the video data for input by the source driver, and generate control signals for the gate and source drivers, and wherein the DDIC comprises a plurality of nodes below a maximum node size that were formed according to a second, different process node; and providing an interconnection component disposed between the display element and the discrete DDIC, wherein the interconnection component communicatively links the control circuit elements in the display package of the DDIC to the display element.