# US 11,910,620 B2 · Magnetic tunnel junction device with residue-protection sidewall spacer and the method for forming a magnetic tunnel junction device with residue-protection sidewall spacer

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- Number: US 11,910,620 B2
- Document ID: US11910620B2
- Status: Granted
- Kind: B2
- Application number: 17/750,460
- Filed: 2022-05-23
- Published: 2022-09-08
- Granted: 2024-02-20
- Earliest claimed: 2019-04-25
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Company Ltd.
- Inventors: Chern-Yow Hsu
- Web page: https://patentgrep.com/patent/US11910620B2

## CPC

- H10B 61/22: {of the field-effect transistor [FET] type}
- H10N 50/01: Manufacture or treatment
- H10N 50/10: Magnetoresistive devices
- H10N 50/80: Constructional details
- H10B: ELECTRONIC MEMORY DEVICES
- H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR

## Abstract

The present disclosure provides a semiconductor structure, and a method for fabricating a semiconductor structure, the method includes forming a bottom electrode, forming a magnetic tunneling junction (MTJ) layer over the bottom electrode, wherein the MTJ layer includes a first material, forming a top electrode over the MTJ layer, forming a first dielectric layer over the top electrode and the MTJ layer, and patterning the MTJ layer to form an MTJ, thereby generating residue over an outer sidewall of the first dielectric layer, wherein the residue comprises the first material, and the residue is apart from the bottom electrode, forming a second dielectric layer over the first dielectric layer to encapsulate the residue, and forming an insulation layer surrounding the second dielectric layer.

## Claims

### Claim 1

A method for fabricating a semiconductor structure, comprising:
forming a bottom electrode;
forming a magnetic tunneling junction (MTJ) layer over the bottom electrode, wherein the MTJ layer comprises a first material;
forming a top electrode over the MTJ layer;
forming a first dielectric layer over the top electrode and the MTJ layer; and
patterning the MTJ layer to form an MTJ, thereby generating residue over an outer sidewall of the first dielectric layer, wherein the residue comprises the first material, and the residue is apart from the bottom electrode;
forming a second dielectric layer over the first dielectric layer to encapsulate the residue; and
forming an insulation layer surrounding the second dielectric layer.

### Claim 2 (depends on 1)

The method for fabricating a semiconductor structure of claim 1, further comprising forming a mask layer above the top electrode prior to forming the first dielectric layer.

### Claim 3 (depends on 2)

The method for fabricating a semiconductor structure of claim 2, further comprising removing the mask layer subsequent to forming the first dielectric layer.

### Claim 4 (depends on 3)

The method for fabricating a semiconductor structure of claim 3, wherein the mask layer is simultaneously removed while patterning the MTJ layer.

### Claim 5 (depends on 1)

The method for fabricating a semiconductor structure of claim 1, further comprising removing a portion of the second dielectric to expose a top surface of the top electrode.

### Claim 6 (depends on 1)

The method for fabricating a semiconductor structure of claim 1, further comprising removing a portion of the first dielectric layer at a top of the top electrode and a top of the MTJ layer prior to patterning the MTJ layer.

### Claim 7 (depends on 6)

The method for fabricating a semiconductor structure of claim 6, wherein removing the portion of the first dielectric layer at the top of the top electrode and the top of the MTJ layer comprises performing a directional etching operation.

### Claim 8 (depends on 6)

The method for fabricating a semiconductor structure of claim 6, further comprising:
forming a conductive line over the top electrode after removing the portion of the second dielectric, the conductive line being in contact with the top electrode, the first dielectric layer, and the second dielectric layer.

### Claim 9

A method for fabricating a semiconductor structure, comprising:
forming a metal line;
forming a magnetic tunneling junction (MTJ) layer over the metal line, wherein the MTJ layer comprises a first material;
forming a top electrode over the MTJ layer;
forming a first dielectric layer, comprising a first portion over at least a portion of a sidewall of the top electrode and a second portion above at least a portion of the MTJ layer;
partially removing the MTJ layer to form an MTJ after forming the first dielectric layer, thereby generating residue over an outer sidewall of the first dielectric layer, wherein the residue comprises the first material, and at least a portion of a remaining portion of the MTJ layer is in direct contact with the MTJ; and
forming a second dielectric layer over the first dielectric layer to encapsulate the residue.

### Claim 10 (depends on 9)

The method for fabricating a semiconductor structure of claim 9, further comprising removing the second portion of the first dielectric layer prior to partially removing the MTJ layer.

### Claim 11 (depends on 9)

The method for fabricating a semiconductor structure of claim 9, further comprising forming an insulation layer surrounding the second dielectric layer.

### Claim 12 (depends on 9)

The method for fabricating a semiconductor structure of claim 9, wherein partially removing the MTJ layer comprises: performing a dry etching operation.

### Claim 13 (depends on 9)

The method for fabricating a semiconductor structure of claim 9, further comprising forming a bottom electrode under the MTJ layer, wherein the residue is apart from the bottom electrode.

### Claim 14

A method for fabricating a semiconductor structure, comprising:
forming a metal line;
forming a magnetic tunneling junction (MTJ) layer over the metal line, wherein the MTJ layer comprises a first material;
forming a top electrode layer over the MTJ layer;
patterning the top electrode layer with a first mask, thereby forming a top electrode and exposing a top surface of the MTJ layer;
forming a first dielectric layer over a sidewall of the top electrode; and
partially removing the MTJ layer to form an MTJ after forming the first dielectric layer, thereby generating residue over an outer sidewall of the first dielectric layer, wherein the residue comprises the first material;
forming a second dielectric layer over the first dielectric layer to encapsulate the residue; and
forming an insulation layer surrounding the second dielectric layer.

### Claim 15 (depends on 14)

The method for fabricating a semiconductor structure of claim 14, further comprising forming a bottom electrode under the MTJ layer, wherein the residue is apart from the bottom electrode.

### Claim 16 (depends on 14)

The method for fabricating a semiconductor structure of claim 14, wherein the first material is conductive.

### Claim 17 (depends on 14)

The method for fabricating a semiconductor structure of claim 14, wherein the MTJ comprises a tunnel barrier layer and a ferromagnetic layer overlapping with the tunnel barrier layer.

### Claim 18 (depends on 17)

The method for fabricating a semiconductor structure of claim 17, wherein at least a portion of the residue is at a level above a top surface of the tunnel barrier layer.

### Claim 19 (depends on 14)

The method for fabricating a semiconductor structure of claim 14, further comprising performing a planarization operation over the top electrode, wherein at least a portion of the second dielectric layer is removed and a top surface of the top electrode is exposed.

### Claim 20 (depends on 19)

The method for fabricating a semiconductor structure of claim 19, further comprising forming a conductive line over the top surface of the top electrode, wherein the conductive line is in direct contact with the first dielectric layer.