# US 11,910,540 B2 · Circuit board with solder mask on internal copper pad

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- Number: US 11,910,540 B2
- Document ID: US11910540B2
- Status: Granted
- Kind: B2
- Application number: 17/819,920
- Filed: 2022-08-15
- Published: 2023-10-12
- Granted: 2024-02-20
- Earliest claimed: 2022-04-08
- Applicants: DSBJ Pte. Ltd.
- Inventors: Pui Yin Yu; Hong Tu Zhang
- Web page: https://patentgrep.com/patent/US11910540B2

## CPC

- H05K 3/3452: Solder masks
- H05K 3/4614: {the electrical connections between the circuit boards being made during lamination}
- H05K 1/113: {Via provided in pad; Pad over filled via}
- H05K 3/244: {Finish plating of conductors, especially of copper conductors, e.g. for pads or lands (selective plating methods H05K3/243; finish plating of conductors made by printing techniques H05K3/246; solder as finish H05K3/3465)}
- H05K 3/3485: Application of solder paste, slurry or powder (using printing techniques to form the desired conductive pattern of the printed circuit by applying conductive material H05K3/12)
- H05K 3/4697: {having cavities, e.g. for mounting components (H05K3/4691 takes precedence)}
- H05K 3/4069: {for via connections in organic insulating substrates}
- H05K 2201/09909: Special local insulating pattern, e.g. as dam around component
- H05K 2203/061: of previously made multilayered subassemblies
- H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS

## Abstract

Embodiments and fabrication methods for a printed circuit board comprising two or more electrically conductive layers, including at least a first conductive layer opposing and adjacent to a second conductive layer. Also including one or more electrically non-conductive layers including at least a first non-conductive layer disposed between the first conductive layer and the second conductive layer. A first copper pad is included on the first conductive layer. A second copper pad is included on the second conductive layer. There is a conductive via extending through the first non-conductive layer and electrically connecting the first copper pad to the second copper pad and solder mask material on the first copper pad around the via.

## Claims

### Claim 1

A method of fabricating a primed circuit board, the method comprising:
providing a first stack-up, wherein the first stack-up includes one or more electrically conductive layers and one or more electrically non-conductive layers;
placing solder mask material on at least one copper pad of the first stack-up, wherein the at least one copper pad is exposed on a first surface of the first stack-up;
placing a prepreg layer on the first surface of the first stack-up over the at least one copper pad;
forming at least one cavity through the prepreg layer and the solder mask material to expose the at least one copper pad;
placing conductive paste in the at least one cavity;
aligning a second stack-up with the first stack-up, wherein the second stack-up includes one or more electrically conductive layers and one or more electrically non-conductive layers, such that the conductive paste aligns with a second copper pad of the second stack-up; and
laminating the second stack-up to the first stack-up.

### Claim 2 (depends on 1)

The method of claim 1, comprising:
sintering the conductive paste.

### Claim 3 (depends on 1)

The method of claim 1, comprising:
curing the solder mask material.

### Claim 4 (depends on 1)

The method of claim 1, comprising:
curing the solder mask material; and
sintering the conductive paste.

### Claim 5 (depends on 1)

The method of claim 1, wherein the conductive paste includes copper.

### Claim 6 (depends on 1)

The method of claim 1, wherein the conductive paste includes silver.

### Claim 7 (depends on 1)

The method of claim 1, wherein the solder mask material includes epoxy liquid.

### Claim 8 (depends on 1)

The method of claim 1, wherein the solder mask material includes liquid ink.