# US 11,910,527 B2 · Substrate with electronic component embedded therein

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- Number: US 11,910,527 B2
- Document ID: US11910527B2
- Status: Granted
- Kind: B2
- Application number: 17/198,625
- Filed: 2021-03-11
- Published: 2022-01-27
- Granted: 2024-02-20
- Earliest claimed: 2020-07-27
- Assignees: Samsung Electro-Mechanics Co., Ltd.
- Applicants: Samsung Electro-Mechanics Co., Ltd.
- Inventors: Song I Kim; Mi Sun Hwang
- Web page: https://patentgrep.com/patent/US11910527B2

## CPC

- H05K 1/111: {Pads for surface mounting, e.g. lay-out}
- H10W 70/614: {the multiple chips being integrally enclosed}
- H05K 1/03: Use of materials for the substrate
- H05K 1/185: associated with components encapsulated in the insulating substrate of the PCBs; associated with components incorporated in internal layers of multilayer circuit boards
- H10W 70/65: Shapes or dispositions of interconnections
- H10W 70/685: comprising multiple insulating layers
- H05K 1/113: {Via provided in pad; Pad over filled via}
- H05K 3/4602: {characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated}
- H05K 2203/061: of previously made multilayered subassemblies
- H05K 2203/1469: Circuit made after mounting or encapsulation of the components
- H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts}
- H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A substrate with an electronic component embedded therein includes: a core layer having a through-portion; an electronic component disposed in the through-portion; an encapsulant disposed on a lower surface of the core layer, disposed in at least a portion of the through-portion, and covering at least a portion of a lower surface of the electronic component; and a build-up structure disposed on an upper surface of the core layer, and including a plurality of insulating layers, a plurality of wiring layers, and a plurality of via layers.

## Claims

### Claim 1

A substrate with an electronic component embedded therein, comprising:
a core layer having a through-portion;
the electronic component disposed in the through-portion;
an encapsulant disposed on a lower surface of the core layer, disposed in at least a portion of the through-portion, and covering at least a portion of a lower surface of the electronic component;
a build-up structure disposed on an upper surface of the core layer, and including a plurality of insulating layers, a plurality of wiring layers, and a plurality of via layers; and
a first wiring via connecting at least a portion of a first wiring layer, as one of the plurality of wiring layers, to the electronic component,
wherein the first wiring via penetrates through one of the plurality of insulating layers and at least a portion of the encapsulant,
a via, among the plurality of via layers, penetrates through the one of the plurality of insulating layers and has a shape tapered in a direction, opposite to the first wiring via, and
another of the plurality of insulating layers is in contact with the core layer.

### Claim 2 (depends on 1)

The substrate with the electronic component embedded therein of claim 1, wherein the encapsulant further covers at least a portion of each of an upper surface and a side surface of the electronic component.

### Claim 3 (depends on 2)

The substrate with the electronic component embedded therein of claim 2, wherein the encapsulant is in physical contact with at least a portion of each of the upper surface, the side surface, and the lower surface of the electronic component.

### Claim 4 (depends on 1)

The substrate with the electronic component embedded therein of claim 1, wherein the first wiring via has a height, greater than a via of each of the plurality of via layers.

### Claim 5 (depends on 1)

The substrate with the electronic component embedded therein of claim 1, wherein the first wiring via also penetrates through a third one of the plurality of insulating layers, and
another via, among the plurality of via layers, penetrates through the third one of the plurality of insulating layer and has a shape tapered in the same direction as the first wiring via.

### Claim 6 (depends on 1)

The substrate with the electronic component embedded therein of claim 1, further comprising a backside wiring layer disposed on a lower surface of the encapsulant; and
a second wiring via connecting at least a portion of a second wiring layer, as another one of the plurality of wiring layers, to the backside wiring layer,
wherein the second wiring via penetrates through the core layer and at least a portion of the encapsulant.

### Claim 7 (depends on 6)

The substrate with the electronic component embedded therein of claim 6, wherein the first wiring layer is disposed above the second wiring layer.

### Claim 8 (depends on 6)

The substrate with the electronic component embedded therein of claim 6, wherein the first and second wiring vias have a shape tapered in directions opposite to each other.

### Claim 9 (depends on 6)

The substrate with the electronic component embedded therein of claim 6, wherein the second wiring via further penetrates through an insulating layer covering the second wiring layer of the plurality of insulating layers and in contact with the core layer.

### Claim 10 (depends on 1)

The substrate with the electronic component embedded therein of claim 1, wherein the build-up structure has a cavity penetrating through at least one of the plurality of insulating layers and connected to the through-portion.

### Claim 11 (depends on 10)

The substrate with the electronic component embedded therein of claim 10, wherein a side portion of the cavity has a step.

### Claim 12 (depends on 10)

The substrate with the electronic component embedded therein of claim 10, wherein the cavity comprises a first region having a first planar area on a plane, and a second region having a second planar area, greater than the first planar area on a plane, and
the first region of the cavity is connected to the through-portion.

### Claim 13 (depends on 1)

The substrate with the electronic component embedded therein of claim 1, wherein the electronic component comprises an integrated circuit die having a connection pad disposed on an upper surface thereof.

### Claim 14

A substrate with an electronic component embedded therein, comprising:
a core layer having a through-portion;
the electronic component disposed in the through-portion;
an encapsulant embedding at least a portion of the electronic component; and
a build-up structure disposed on the core layer, and including a plurality of insulating layers, a plurality of wiring layers, and a plurality of via layers,
wherein a via of a first via layer as one of the plurality of via layers, and a via of a second via layer as another one of the plurality of via layers, penetrate through a same one of the plurality of insulating layers and have a shape tapered in directions opposite to each other,
the via of the first via layer penetrates at least a portion of the encapsulant, and
another of the plurality of insulating layers is in contact with the core layer.

### Claim 15 (depends on 14)

The substrate with the electronic component embedded therein of claim 14, wherein the first via layer is disposed above the second via layer,
a width of an upper surface of the via of the first via layer is greater than a width of a lower surface of the via of the first via layer, and
a width of a lower surface of the via of the second via layer is greater than a width of an upper surface of the via of the second via layer.

### Claim 16

A substrate with an electronic component embedded therein, comprising:
a core layer having a through-portion;
the electronic component disposed in the through-portion and including a connection pad disposed on a first surface of the electronic component;
an encapsulant extending to cover at least a portion of the first surface and at least a portion of a second surface of the electronic component opposing the first surface; and
a build-up structure disposed on a surface of the core layer, and including a plurality of first insulating layers, a plurality of first wiring layers, and a plurality of first via layers,
wherein one via of the plurality of first via layers and another via of the plurality of first via layers penetrate through a same one of the plurality of first insulating layers and have a shape tapered in directions opposite to each other,
the one via of the plurality of first via layers penetrates at least a portion of the encapsulant, and
another of the plurality of first insulating layers is in contact with the core layer.

### Claim 17 (depends on 16)

The substrate with the electronic component embedded therein of claim 16, comprising:
one or more second wiring layers disposed on another surface of the core layer,
wherein the number of the plurality of first wiring layers is greater than the number of the one or more second wiring layers.

### Claim 18 (depends on 17)

The substrate with the electronic component embedded therein of claim 17, further comprising a second via layer extending from one of the one or more second wiring layers to connect to one of the plurality of first wiring layers,
wherein a via of the second via layer and the one via of the plurality of first via layers connected to the connection pad have a shape tapered in directions opposite to each other.

### Claim 19 (depends on 16)

The substrate with the electronic component embedded therein of claim 16, wherein the build-up structure has a cavity penetrating through one or more of the plurality of first insulating layers, and
the cavity is connected to the through-portion.

### Claim 20 (depends on 16)

The substrate with the electronic component embedded therein of claim 16, wherein two wiring layers among the first wiring layers are respectively disposed on opposing surfaces of one of the plurality of first insulating layers, and
each of the two wiring layers protrudes from the one of the plurality of first insulating layers.

### Claim 21 (depends on 16)

The substrate with the electronic component embedded therein of claim 16, wherein a height of the one via is different from a height of the another via.