# US 11,909,316 B2 · In-rush current protected power converter

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- Number: US 11,909,316 B2
- Document ID: US11909316B2
- Status: Granted
- Kind: B2
- Application number: 17/968,440
- Filed: 2022-10-18
- Published: 2023-04-20
- Granted: 2024-02-20
- Earliest claimed: 2020-02-06
- Assignees: pSemi Corporation
- Applicants: pSemi Corporation
- Inventors: Antony Christopher Routledge
- Web page: https://patentgrep.com/patent/US11909316B2

## CPC

- H02M 3/07: using capacitors charged and discharged alternately by semiconductor devices with control electrode {, e.g. charge pumps}
- H02M 3/158: including plural semiconductor devices as final control devices for a single load
- H02M 1/32: Means for protecting converters other than automatic disconnection
- H02H 7/1213: {for DC-DC converters}
- H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P)
- H02H: EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS (indicating or signalling undesired working conditions G01R, e.g. G01R31/00, G08B; locating faults along lines G01R31/08; emergency protective devices H01H)

## Abstract

Circuits and methods for protecting the switches of charge pump-based power converters from damage if a VOUT short circuit event occurs and/or if VIN falls rapidly with respect to VX or VOUT. A general embodiment includes a VX Detection Block coupled to the core block of a power converter. The VX Detection Block is coupled to VX and to a control circuit that disables operations of an associated converter circuit upon detection of large, rapid falls in VX during the dead time between clock phase signals, thereby prevent damaging current spikes. Some embodiments include a VIN Detection Block configured to detect and prevent excessive in-rush current due to rapidly falling values of VIN to the power converter. The VIN Detection Block is coupled to VIN, and to VX or VOUT in some embodiments, and to a control circuit to that disables operation of an associated converter circuit.

## Claims

### Claim 1

A power converter including:
(a) a converter circuit configured to convert an input voltage VIN to a different output voltage VOUT;
(b) a control block for disabling operation of the converter circuit;
(c) a voltage node VX between the converter circuit and the output VOUT;
(d) a VIN detection block, coupled to the input voltage VIN and to the control block, and optionally coupled to one of VOUT or the voltage node VX, and configured to detect a voltage drop in the input voltage VIN and generate a control signal to the control block to disable operation of the converter circuit;
wherein the converter circuit is coupled to a source of at least two non-overlapping clock signals having ON states separated by a dead time, and wherein the VIN detection block is configured to detect the voltage drop in the input voltage VIN during the dead time.

### Claim 2 (depends on 1)

The power converter of claim 1, wherein the VIN detection block is configured to detect a voltage drop in the input voltage VIN where the voltage drop has a magnitude that induces damage to the converter circuit.

### Claim 3 (depends on 1)

The power converter of claim 1, wherein the converter circuit, the control block, the voltage node VX, and the VIN detection block are embodied in a single integrated circuit die.

### Claim 4

A power converter including:
(a) a converter circuit configured to convert an input voltage VIN to a different output voltage VOUT;
(b) a control block for disabling operation of the converter circuit;
(c) a voltage node VX between the converter circuit and the output VOUT;
(d) a VIN detection block, coupled to the input voltage VIN and to the control block, and optionally coupled to one of VOUT or the voltage node VX, and configured to detect a voltage drop in the input voltage VIN and generate a control signal to the control block to disable operation of the converter circuit, wherein the VIN detection block includes:
(1) a PMOS FET having a gate coupled to the voltage input VIN, a source, and a drain;
(2) a resistor coupled between the voltage input VIN and the source of the PMOS FET;
(3) a capacitor coupled between the source of the PMOS FET and a reference voltage;
(4) an inverter coupled to the drain of the PMOS FET; and
(5) a threshold voltage adjustment circuit coupled to the drain of the PMOS FET;
wherein the PMOS FET causes the inverter to generate the control signal if a voltage applied to the gate of the PMOS FET from the voltage input VIN has a voltage drop relative to a voltage across the capacitor.

### Claim 5 (depends on 4)

The power converter of claim 4, further including a degeneration resistor coupled between the capacitor and the source of the PMOS FET.

### Claim 6 (depends on 1)

The power converter of claim 1, wherein the VIN detection block further includes:
(a) a scaling circuit coupled to the input voltage VIN and configured to output a scaled output voltage;
(b) a comparator circuit, having a first input coupled to the scaled output voltage and a second input coupled to one of VOUT or the voltage node VX, and configured to output the control signal upon the occurrence of a voltage drop in the input voltage VIN relative to the voltage coupled to the second input.

### Claim 7

A method for protecting a power converter, including:
(a) monitoring an input voltage VIN to a converter circuit of the power converter;
(b) applying a source of at least two non-overlapping clock signals having ON states separated by a dead time to the converter circuit; and
(c) disabling operation of the converter circuit upon detection of a voltage drop in the input voltage VIN during the dead time.

### Claim 8 (depends on 7)

The method of claim 7, wherein the voltage drop of the input voltage VIN has a magnitude that induces damage to the power converter.

### Claim 9 (depends on 7)

The method of claim 7, further including detecting a voltage drop in of the input voltage VIN relative to one of an output voltage VOUT of the power converter or a voltage node VX of the converter circuit.