# US 11,908,951 B2 · TFT substrate and light emitting display device including the same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,908,951 B2 - Document ID: US11908951B2 - Status: Granted - Kind: B2 - Application number: 17/562,641 - Filed: 2021-12-27 - Published: 2022-04-21 - Granted: 2024-02-20 - Earliest claimed: 2018-09-13 - Assignees: LG Display Co., Ltd. - Applicants: LG Display Co., Ltd. - Inventors: Kum-Mi Oh - Web page: https://patentgrep.com/patent/US11908951B2 ## CPC - H10D 30/6757: {characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715)} - H10D 30/6713: {characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes} - H10D 30/6715: {characterised by the doping profiles, e.g. having lightly-doped source or drain extensions} - H10D 30/6729: {characterised by the electrodes} - H10D 30/673: {characterised by the shapes, relative sizes or dispositions of the gate electrodes} - H10D 30/6745: {Polycrystalline or microcrystalline silicon} - H10D 86/421: {having a particular composition, shape or crystalline structure of the active layer} - H10D 30/6723: {having light shields} - H10D 86/471: {having different architectures, e.g. having both top-gate and bottom-gate TFTs} - H10D 86/481: {integrated with passive devices, e.g. auxiliary capacitors} - H10D 86/60: wherein the TFTs are in active matrices - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract A thin film transistor (TFT) substrate comprises a TFT located on a substrate and including a gate electrode, a first semiconductor layer and a second semiconductor layer, wherein the first semiconductor layer, the gate electrode and the second semiconductor layer vertically stacked, and the first and second semiconductor layers are made of polycrystalline silicon, and wherein the first and second semiconductor layers are electrically connected to each other in series and respectively include first and second channel portions, and at least one of the first and second channel portions has a bent structure in a plan view. ## Claims ### Claim 1 A display device, comprising: a thin film transistor (TFT) substrate that has a TFT including a gate electrode, a first semiconductor layer and a second semiconductor layer; a first electrode connected to the TFT; and wherein the first semiconductor layer, the gate electrode and the second semiconductor layer vertically stacked, and the first and second semiconductor layers are made of polycrystalline silicon, and wherein the first and second semiconductor layers are electrically connected to each other in series and respectively include first and second channel portions, and at least one of the first and second channel portions has a bent structure in a plan view, wherein the TFT further comprises: a first gate insulating layer between the first semiconductor layer and the gat electrode; a second gate insulating layer between the second semiconductor layer and the gate electrode and on the first gate insulating layer; a passivation layer on the second semiconductor layer; and a connection electrode on the passivation layer, wherein the connection electrode contacts one of a source portion and a drain portion of the second semiconductor layer and the other of a source portion and a drain portion of the first semiconductor layer through a contact hole in the passivation layer and the first and second gate insulating layers, and wherein a length of a connection path of the one of the source portion and the drain portion of the second semiconductor layer and the other of the source portion and the drain portion of the first semiconductor layer is equal to a distance between the one of the source portion and the drain portion of the second semiconductor layer and the other of the source portion and the drain portion of the first semiconductor layer. ### Claim 2 (depends on 1) The display device of claim 1, wherein the first channel portion includes a first channel part extending in a first direction, and a second channel part extending in a second direction different from the first direction, wherein the second channel portion includes a third channel part extending in the first direction and overlapping the first channel part, and a fourth channel part extending in a third direction different from the second direction, and wherein the first and third channel parts have a same channel length. ### Claim 3 (depends on 2) The display device of claim 2, wherein the fourth channel part extends in a third direction different from the first and second directions. ### Claim 4 (depends on 2) The display device of claim 2, wherein the fourth channel part further extends in the first direction from the first channel part. ### Claim 5 (depends on 2) The display device of claim 2, wherein the second and fourth channel parts have a same channel length or different channel lengths. ### Claim 6 (depends on 1) The display device of claim 1, wherein the one of the source and drain portions of the second semiconductor layer contacts the connection electrode at an inner surface surrounding the contact hole. ### Claim 7 (depends on 1) The display device of claim 1, wherein the first and second semiconductor layers respectively include first and second lightly doped drain (LDD) portions, and the first and second LDD portions have a same length or different lengths. ### Claim 8 (depends on 1) The display device of claim 1, further comprising an electrode pattern located on and corresponding to the second channel portion of the second semiconductor layer which is on the first semiconductor layer, and wherein the electrode pattern is connected to one of a source electrode, a drain electrode and the gate electrode of the TFT, or is supplied with a bias voltage from a power supply circuit. ### Claim 9 (depends on 1) The display device of claim 1, further comprising a light emitting diode including the first electrode. ### Claim 10 (depends on 2) The display device of claim 2, wherein the third direction is different from the first direction, and the fourth channel part does not overlap the second channel part. ### Claim 11 (depends on 1) The display device of claim 1, wherein the contact hole is formed through the second semiconductor layer and extends into a surface of the first semiconductor layer. ### Claim 12 A thin film transistor (TFT) substrate, comprising: a TFT located on a substrate and including a gate electrode, a first semiconductor layer and a second semiconductor layer, the first semiconductor layer, the gate electrode and the second semiconductor layer vertically stacked, and the first and second semiconductor layers made of polycrystalline silicon, wherein the first and second semiconductor layers are electrically connected in series to each other, and respectively include first and second channel portions, and wherein the first channel portion includes a first channel part extending in a first direction, and a second channel part extending in a second direction different from the first direction, wherein the second channel portion includes a third channel part extending in the first direction and vertically overlapping the first channel part, a fourth channel part extending in a direction different from the first direction and the second direction and not overlapping the second channel part, and the first and third channel parts have a same channel length. ### Claim 13 (depends on 12) The TFT substrate of claim 12, further comprising: a first gate insulating layer between the first semiconductor layer and the gat electrode; a second gate insulating layer between the second semiconductor layer and the gate electrode and on the first gate insulating layer; a passivation layer on the second semiconductor layer; and a connection electrode on the passivation layer, wherein the connection electrode contacts one of a source portion and a drain portion of the second semiconductor layer and the other of a source portion and a drain portion of the first semiconductor layer through a contact hole in the passivation layer and the first and second gate insulating layers. ### Claim 14 (depends on 12) The TFT substrate of claim 12, wherein the first and second semiconductor layers respectively include first and second lightly doped drain (LDD) portions, and the first and second LDD portions have a same length or different lengths. ### Claim 15 (depends on 12) The TFT substrate of claim 12, further comprising an electrode pattern corresponding to the second channel portion of the second semiconductor layer which is on the first semiconductor layer, and wherein the electrode pattern is connected to one of a source electrode, a drain electrode and the gate electrode of the TFT, or is supplied with a bias voltage from a power supply circuit. ### Claim 16 (depends on 13) The TFT substrate of claim 13, wherein the contact hole is formed through the second semiconductor layer and extends into a surface of the first semiconductor layer. ### Claim 17 (depends on 13) The TFT substrate of claim 13, wherein a length of a connection path of the one of the source portion and the drain portion of the second semiconductor layer and the other of the source portion and the drain portion of the first semiconductor layer is equal to a distance between the one of the source portion and the drain portion of the second semiconductor layer and the other of the source portion and the drain portion of the first semiconductor layer.