# US 11,908,950 B2 · Charge-transfer spacers for stacked nanoribbon 2D transistors

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- Number: US 11,908,950 B2
- Document ID: US11908950B2
- Status: Granted
- Kind: B2
- Application number: 16/902,069
- Filed: 2020-06-15
- Published: 2021-12-16
- Granted: 2024-02-20
- Earliest claimed: 2020-06-15
- Assignees: Intel Corporation
- Applicants: Intel Corporation
- Inventors: Kirby Maxey; Chelsey Dorow; Kevin P. O'Brien; Carl Naylor; Ashish Verma Penumatcha; Tanay Gosavi; Uygar E. Avci; Shriram Shivaraman
- Web page: https://patentgrep.com/patent/US11908950B2

## CPC

- H10D 30/6757: {characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715)}
- H10D 30/501: {FETs having stacked nanowire, nanosheet or nanoribbon channels}
- H10D 30/6735: {having gates fully surrounding the channels, e.g. gate-all-around}
- H10D 62/80: characterised by the materials
- H10D 62/883: {Transition metal dichalcogenides, e.g. MoSe2}
- H10D 64/118: {Electrodes comprising insulating layers having particular dielectric or electrostatic properties, e.g. having static charges}
- H10D 99/00: Subject matter not provided for in other groups of this subclass
- B82Y 10/00: Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
- H10D 64/251: {Source or drain electrodes for field-effect devices}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- B82Y: SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES

## Abstract

Embodiments include two-dimensional (2D) semiconductor sheet transistors and methods of forming such devices. In an embodiment, a semiconductor device comprises a stack of 2D semiconductor sheets, where individual ones of the 2D semiconductor sheets have a first end and a second end opposite from the first end. In an embodiment, a first spacer is over the first end of the 2D semiconductor sheets, and a second spacer is over the second end of the 2D semiconductor sheets. Embodiments further comprise a gate electrode between the first spacer and the second spacer, a source contact adjacent to the first end of the 2D semiconductor sheets, and a drain contact adjacent to the second end of the 2D semiconductor sheets.

## Claims

### Claim 1

A semiconductor device, comprising:
a stack of two-dimensional (2D) semiconductor sheets, wherein individual ones of the 2D semiconductor sheets have a first end and a second end opposite from the first end;
a first spacer over the first end of the 2D semiconductor sheets;
a second spacer over the second end of the 2D semiconductor sheets;
a gate electrode between the first spacer and the second spacer, wherein the gate electrode is between pairs of the 2D semiconductor sheets;
a source contact adjacent to the first end of the 2D semiconductor sheets; and
a drain contact adjacent to the second end of the 2D semiconductor sheets.

### Claim 2 (depends on 1)

The semiconductor device of claim 1, wherein the 2D semiconductor sheets comprise transition metal dichalcogenides.

### Claim 3 (depends on 1)

The semiconductor device of claim 1, wherein the gate electrode is separated from the source contact and the drain contact by an insulating plug between the 2D semiconductor sheets.

### Claim 4 (depends on 1)

The semiconductor device of claim 1, wherein a second gate electrode is around an exterior of pairs of 2D semiconductor sheets.

### Claim 5 (depends on 1)

The semiconductor device of claim 1, wherein the first end of the 2D semiconductor sheet is substantially coplanar with a surface of the first spacer, and wherein the second end of the 2D semiconductor sheet is substantially coplanar with a surface of the second spacer.

### Claim 6 (depends on 1)

The semiconductor device of claim 1, wherein a surface of the first spacer is recessed from the first end of the 2D semiconductor sheet, and wherein a surface of the second spacer is recessed from the second end of the 2D semiconductor sheet.

### Claim 7 (depends on 1)

The semiconductor device of claim 1, wherein a bottommost 2D semiconductor sheet comprises protrusions that extend below the source contact and the drain contact.

### Claim 8 (depends on 7)

The semiconductor device of claim 7, wherein an insulating layer is disposed over the protrusions.

### Claim 9 (depends on 1)

The semiconductor device of claim 1, wherein the first spacer and the second spacer are charge-transfer materials.

### Claim 10 (depends on 9)

The semiconductor device of claim 9, wherein the first spacer and the second spacer comprise aluminum and oxygen, or molybdenum and oxygen.

### Claim 11

A method of forming a semiconductor device, comprising:
forming a stack of first layers and second layers in an alternating pattern over a substrate;
forming a recesses into a first end and a second end of the stack to expose the substrate;
laterally recessing the second layers at the first end and the second to form lateral recesses;
filling the lateral recesses to form a first spacer at the first end and a second spacer at the second end;
removing the first layers;
forming two-dimensional (2D) semiconductor sheets between the second layers, the first spacer, and the second spacer;
filling a space between pairs of the 2D semiconductor sheets with a gate electrode;
forming a source contact adjacent to a first end of the 2D semiconductor sheets; and
forming a drain contact adjacent to a second end of the 2D semiconductor sheets.

### Claim 12 (depends on 11)

The method of claim 11, further comprising:
removing the second layers after filling of the space between pairs of the 2D semiconductor sheets with the gate electrode; and
disposing a second gate electrode around an exterior of the 2D semiconductor sheets between the first spacer and the second spacer.

### Claim 13 (depends on 11)

The method of claim 11, further comprising:
laterally recessing the gate electrode between the 2D semiconductor sheets to form second lateral recesses; and
filling the second lateral recesses with an insulating plug.

### Claim 14 (depends on 11)

The method of claim 11, wherein the 2D semiconductor sheets comprise transition metal dichalcogenides.

### Claim 15 (depends on 11)

The method of claim 11, wherein the first spacer and the second spacer are charge-transfer materials.

### Claim 16 (depends on 15)

The method of claim 15, wherein the first spacer and the second spacer comprise aluminum and oxygen, or molybdenum and oxygen.

### Claim 17 (depends on 11)

The method of claim 11, wherein the first layers comprise aluminum and nitrogen, and wherein the second layers comprise gallium and nitrogen, or wherein the first layers comprise an oxide, and wherein the second layers comprise a nitride.

### Claim 18

An electronic system, comprising:
a board;
an electronic package coupled to the board; and
a die electrically coupled to the electronic package, wherein the die comprises:
a stack of two-dimensional (2D) semiconductor sheets, wherein individual ones of the 2D semiconductor sheets have a first end and a second end opposite from the first end;
a first spacer over the first end of the 2D semiconductor sheets;
a second spacer over the second end of the 2D semiconductor sheets;
a gate electrode between the first spacer and the second spacer, wherein the gate electrode is between pairs of the 2D semiconductor sheets;
a source contact adjacent to the first end of the 2D semiconductor sheets; and
a drain contact adjacent to the second end of the 2D semiconductor sheets.

### Claim 19 (depends on 18)

The electronic system of claim 18, wherein the 2D semiconductor sheets comprise transition metal dichalcogenides.

### Claim 20

A semiconductor device, comprising:
a stack of two-dimensional (2D) semiconductor sheets, wherein individual ones of the 2D semiconductor sheets have a first end and a second end opposite from the first end;
a first spacer over the first end of the 2D semiconductor sheets;
a second spacer over the second end of the 2D semiconductor sheets, wherein the first end of the 2D semiconductor sheet is substantially coplanar with a surface of the first spacer, and wherein the second end of the 2D semiconductor sheet is substantially coplanar with a surface of the second spacer;
a gate electrode between the first spacer and the second spacer;
a source contact adjacent to the first end of the 2D semiconductor sheets; and
a drain contact adjacent to the second end of the 2D semiconductor sheets.

### Claim 21

A semiconductor device, comprising:
a stack of two-dimensional (2D) semiconductor sheets, wherein individual ones of the 2D semiconductor sheets have a first end and a second end opposite from the first end;
a first spacer over the first end of the 2D semiconductor sheets;
a second spacer over the second end of the 2D semiconductor sheets, wherein a surface of the first spacer is recessed from the first end of the 2D semiconductor sheet, and wherein a surface of the second spacer is recessed from the second end of the 2D semiconductor sheet;
a gate electrode between the first spacer and the second spacer;
a source contact adjacent to the first end of the 2D semiconductor sheets; and
a drain contact adjacent to the second end of the 2D semiconductor sheets.

### Claim 22

A semiconductor device, comprising:
a stack of two-dimensional (2D) semiconductor sheets, wherein individual ones of the 2D semiconductor sheets have a first end and a second end opposite from the first end, wherein a bottommost 2D semiconductor sheet comprises protrusions that extend below the source contact and the drain contact, and, wherein an insulating layer is disposed over the protrusions;
a first spacer over the first end of the 2D semiconductor sheets;
a second spacer over the second end of the 2D semiconductor sheets;
a gate electrode between the first spacer and the second spacer;
a source contact adjacent to the first end of the 2D semiconductor sheets; and
a drain contact adjacent to the second end of the 2D semiconductor sheets.

### Claim 23

A semiconductor device, comprising:
a stack of two-dimensional (2D) semiconductor sheets, wherein individual ones of the 2D semiconductor sheets have a first end and a second end opposite from the first end;
a first spacer over the first end of the 2D semiconductor sheets;
a second spacer over the second end of the 2D semiconductor sheets, wherein the first spacer and the second spacer are charge-transfer materials;
a gate electrode between the first spacer and the second spacer;
a source contact adjacent to the first end of the 2D semiconductor sheets; and
a drain contact adjacent to the second end of the 2D semiconductor sheets.

### Claim 24 (depends on 23)

The semiconductor device of claim 23, wherein the first spacer and the second spacer comprise aluminum and oxygen, or molybdenum and oxygen.