# US 11,908,924 B2 · Semiconductor device including two thin-film transistors and method of fabricating the same

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- Number: US 11,908,924 B2
- Document ID: US11908924B2
- Status: Granted
- Kind: B2
- Application number: 17/652,843
- Filed: 2022-02-28
- Published: 2022-06-09
- Granted: 2024-02-20
- Earliest claimed: 2017-02-13
- Assignees: Samsung Display Co., Ltd.
- Applicants: Samsung Display Co., Ltd.
- Inventors: Jaybum Kim; Seryeong Kim; Junhyung Lim; Taesang Kim
- Web page: https://patentgrep.com/patent/US11908924B2

## CPC

- H10D 86/421: {having a particular composition, shape or crystalline structure of the active layer}
- H10D 30/0321: {comprising silicon, e.g. amorphous silicon or polysilicon}
- H10D 30/6755: {Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate}
- H10D 62/40: Crystalline structures
- H10D 86/423: {comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO}
- H10D 86/471: {having different architectures, e.g. having both top-gate and bottom-gate TFTs}
- H10D 86/481: {integrated with passive devices, e.g. auxiliary capacitors}
- H10D 86/60: wherein the TFTs are in active matrices
- H10D 99/00: Subject matter not provided for in other groups of this subclass
- H10F 39/016: {of thin-film-based image sensors}
- H10K 59/1213: {the pixel elements being TFTs}
- H10K 59/1216: {the pixel elements being capacitors}
- H10D 30/0312: {characterised by the gate electrodes}
- H10K 59/123: Connection of the pixel electrodes to the thin film transistors [TFT]
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES

## Abstract

A semiconductor device includes a base substrate. A first thin-film transistor is disposed on the base substrate. The first thin-film transistor includes a first input electrode, a first output electrode, a first semiconductor pattern disposed below a first insulating layer, and a first control electrode disposed on the first insulating layer and below a second insulating layer. A second thin-film transistor includes a second input electrode, a second output electrode, a second semiconductor pattern disposed on the second insulating layer, and a second control electrode disposed on an insulating pattern formed on the second semiconductor pattern and exposes a portion of the second semiconductor pattern. The first semiconductor pattern includes a crystalline semiconductor. The second semiconductor pattern incudes an oxide semiconductor. The first semiconductor pattern, the first control electrode, the second semiconductor pattern, and the second control electrode are overlapped.

## Claims

### Claim 1

A semiconductor device, comprising:
a base substrate; and
a first thin-film transistor and a second thin-film transistor disposed on the base substrate,
wherein the first thin-film transistor comprises a first output electrode, a first semiconductor pattern including a crystalline semiconductor material, and a control electrode disposed on the first semiconductor pattern,
wherein the second thin-film transistor comprises an input electrode, a second output electrode, the control electrode, a second semiconductor pattern, which is disposed on the control electrode and including an oxide semiconductor material, and a conductive pattern, which is disposed on the second semiconductor pattern and exposes a portion of the second semiconductor pattern,
wherein the control electrode is disposed between the first semiconductor pattern and the second semiconductor pattern,
wherein the first semiconductor pattern, the control electrode, and the second semiconductor pattern are overlapped with each other, when viewed on a plane, and
wherein the conductive pattern passes through the second semiconductor pattern and contacts the first semiconductor pattern.

### Claim 2 (depends on 1)

The semiconductor device of claim 1, wherein the conductive pattern comprises:
a first sub-pattern in contact with the input electrode, the first semiconductor pattern, and the second semiconductor pattern; and
a second sub-pattern spaced apart from the first sub-pattern and in contact with the second output electrode and the second semiconductor pattern, and
wherein the first output electrode is in contact with the first semiconductor pattern.

### Claim 3 (depends on 2)

The semiconductor device of claim 2, wherein the input electrode is disposed on the second semiconductor pattern and the first sub-pattern is disposed between the input electrode and the second semiconductor pattern.

### Claim 4 (depends on 2)

The semiconductor device of claim 2, wherein the second output electrode is disposed on the second semiconductor pattern and the second sub-pattern is disposed between the second output electrode and the second semiconductor pattern.

### Claim 5 (depends on 2)

The semiconductor device of claim 2, further comprising:
a first insulating layer disposed between the first semiconductor pattern and the control electrode;
a second insulating layer disposed between the control electrode and the second semiconductor pattern; and
a third insulating layer disposed on the conductive pattern.

### Claim 6 (depends on 5)

The semiconductor device of claim 5, wherein the input electrode and the second output electrode are in contact with the first sub-pattern and the second sub-pattern through a contact hole defined in the third insulating layer, respectively.

### Claim 7 (depends on 5)

The semiconductor device of claim 5, wherein the first sub-pattern is in contact with the first semiconductor pattern through a contact hole, which penetrates the second semiconductor pattern, the second insulating layer, and the first insulating layer.

### Claim 8 (depends on 5)

The semiconductor device of claim 5, wherein the first output electrode is in contact with the first semiconductor pattern through a contact hole, which penetrates the first, second, and third insulating layers.

### Claim 9 (depends on 1)

The semiconductor device of claim 1, further comprising a capacitor including a first electrode, a second electrode disposed on the first electrode, and a third semiconductor pattern, which is disposed between the first electrode and the second electrode and includes the oxide semiconductor.

### Claim 10 (depends on 9)

The semiconductor device of claim 9, wherein the first electrode is disposed on the same layer as the control electrode, the second electrode is disposed on the same layer as the conductive pattern, and the third semiconductor pattern electrode is disposed on the same layer as the second semiconductor pattern.
