# US 11,908,921 B2 · Transistor isolation structures

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- Number: US 11,908,921 B2
- Document ID: US11908921B2
- Status: Granted
- Kind: B2
- Application number: 17/412,896
- Filed: 2021-08-26
- Published: 2023-03-02
- Granted: 2024-02-20
- Earliest claimed: 2021-08-26
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Co., Ltd.
- Inventors: Yu-Yun Peng; Fu-Ting Yen; Keng-Chu Lin
- Web page: https://patentgrep.com/patent/US11908921B2

## CPC

- H10D 64/018: {Spacers formed inside holes at the prospective gate locations, e.g. holes left by removing dummy gates}
- H10D 30/0196: {by modifying properties of the inner spacers}
- H10D 30/031: {of thin-film transistors [TFT]}
- H10D 30/508: {characterised by the relative sizes, shapes or dispositions of the inner spacers}
- H10D 30/509: {characterised by the material of the inner spacers}
- H10D 62/116: {adjoining the input or output regions of field-effect devices, e.g. adjoining source or drain regions}
- H10D 62/121: {oriented parallel to substrates}
- H10D 62/151: {of IGFETs (of IGFETs having LDD or DDD structure H10D30/601; of thin film transistors H10D30/6713)}
- H10D 64/015: {removing at least parts of gate spacers, e.g. disposable spacers}
- H10D 64/017: {using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e. replacement gate processes}
- H10D 64/021: {using multiple gate spacer layers, e.g. bilayered sidewall spacers}
- H10D 64/679: {comprising air gaps}
- H10P 14/6516: {of treatments performed after formation of the materials}
- H10P 14/6682: {the compound being a silane, e.g. disilane, methylsilane or chlorosilane}
- B82Y 10/00: Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
- H10D 30/6757: {characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715)}
- H10D 30/797: {being in source or drain regions, e.g. SiGe source or drain}
- H10D 62/822: comprising only Group IV materials heterojunctions, e.g. Si/Ge heterojunctions
- H10D 62/832: being Group IV materials comprising two or more elements, e.g. SiGe
- H10P 14/6339: {deposition by cyclic CVD, e.g. ALD, ALE or pulsed CVD}
- H10P 14/6522: {introduced into a nitride material, e.g. changing SiN to SiON}
- H10P 14/6532: {by exposure to a plasma}
- H10P 14/6538: {by exposure to UV light}
- H10P 14/6681: {the precursor containing a compound comprising Si}
- H10P 14/6687: {the compound comprising silicon and nitrogen}
- H10P 14/6905: {being a silicon carbide or silicon carbonitride and not containing oxygen, e.g. SiC or SiC:H}
- H10P 50/283: {by chemical means}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- B82Y: SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES

## Abstract

The present disclosure is directed to method for the fabrication of spacer structures between source/drain (S/D) epitaxial structures and metal gate structures in nanostructure transistors. The method includes forming a fin structure with alternating first and second nanostructure elements on a substrate. The method also includes etching edge portions of the first nanostructure elements in the fin structure to form cavities. Further, depositing a spacer material on the fin structure to fill the cavities and removing a portion of the spacer material in the cavities to form an opening in the spacer material. In addition, the method includes forming S/D epitaxial structures on the substrate to abut the fin structure and the spacer material so that sidewall portions of the S/D epitaxial structures seal the opening in the spacer material to form an air gap in the spacer material.

## Claims

### Claim 1

A structure, comprising:
a substrate:
a pair of source/drain (S/D) epitaxial structures formed on the substrate;
nanostructure elements between the pair of S/D epitaxial structures, wherein the nanostructure elements are separated from each other by layers of a gate structure and by spacer structures interposed between the layers of the gate structure and each S/D epitaxial structure of the pair of S/D epitaxial structures, and wherein each of the spacer structures comprises an air gaps; and
an etch stop layer on top surfaces of the nanostructure elements, wherein the etch stop layer is between the nanostructure elements and the gate structure.

### Claim 2 (depends on 1)

The structure of claim 1, wherein the nanostructure elements are nano-sheet layers in contact with the pair of the S/D epitaxial structures.

### Claim 3 (depends on 1)

The structure of claim 1, wherein the air gap in each spacer structure abuts a sidewall portion of the S/D epitaxial structure.

### Claim 4 (depends on 1)

The structure of claim 1, wherein the air gap in each spacer structure is positioned about 3 nm from the layers of the gate structure.

### Claim 5 (depends on 1)

The structure of claim 1, wherein the air gap has a width in a vertical dimension between about 2 nm and about 12 nm.

### Claim 6 (depends on 1)

The structure of claim 1, wherein the spacer structures comprise a dielectric material with a dielectric constant between about 3.7 and about 5.2.

### Claim 7 (depends on 1)

The structure of claim 1, wherein the spacer structures comprise a dielectric material with a mass density between about 1.7 g/cm3 and about 2.4 g/cm3.

### Claim 8

A method, comprising:
forming a fin structure on a substrate, wherein the fin structure comprises alternating first and second nanostructure elements;
forming a sacrificial gate structure over the fin structure, wherein edge portions of the fin structure are not covered by the sacrificial gate structure;
removing the edge portions of the fin structure;
etching edge portions of the first nanostructure elements in the fin structure to form cavities;
depositing a spacer material on the sacrificial gate structure and the fin structure to fill the cavities;
treating the spacer material with a post-deposition treatment;
removing a portion of the spacer material in the cavities to form an opening in the spacer material; and
forming source/drain (S/D) epitaxial structures on the substrate to abut the fin structure so that the S/D epitaxial structures are in contact with the second nanostructure elements and isolated from the first nanostructure elements by the spacer material, wherein sidewall portions of the S/D epitaxial structures seal the opening in the spacer material to form an air gap in the spacer material.

### Claim 9 (depends on 8)

The method of claim 8, wherein depositing the spacer material comprises depositing the spacer material with a halogen precursor having a chemical formula Si(CH2)SiRxCly, and wherein R is hydrogen (—H) or a methyl group (—CH3), x≥0, y≥1, and x+y=6.

### Claim 10 (depends on 8)

The method of claim 8, wherein depositing the spacer material comprises depositing the spacer material with a halogen precursor having a chemical formula Si(CH2)2SiRxCly, and wherein R is hydrogen (—H) or a methyl group (—CH3), x≥0, y≥1, and x+y=4.

### Claim 11 (depends on 8)

The method of claim 8, wherein depositing the spacer material comprises depositing the spacer material with a nitrogen-free organic precursor having a chemical formula Si(CH2)Si(CH3)xHy, and wherein x≥0, y≥2, and x+y=6.

### Claim 12 (depends on 8)

The method of claim 8, wherein depositing the spacer material comprises depositing the spacer material with a nitrogen-containing organic precursor having a chemical formula SiHx(R1)y(R2)z, and wherein R1 is a methyl group (—CH3,), R2 is NH(CH3) or N(CH3)2, x≥0, y≥1, z≥1, and x+y+z=4.

### Claim 13 (depends on 8)

The method of claim 8, wherein depositing the spacer material comprises depositing the spacer material with an oxygen concentration and a nitrogen concentration, and wherein a dielectric constant of the spacer material increases when a ratio of the oxygen-to-nitrogen concentration increases and decreases when the ratio of the oxygen-to-nitrogen concentration decreases.

### Claim 14 (depends on 8)

The method of claim 8, wherein depositing the spacer material comprises incorporating oxygen in the spacer material via air exposure.

### Claim 15 (depends on 8)

The method of claim 8, wherein forming the sacrificial gate structure comprises forming an inner gate spacer on sidewall surfaces of the sacrificial gate structure, the inner gate spacer having a density higher than that of the spacer material.

### Claim 16 (depends on 8)

The method of claim 8, wherein removing the portion of the spacer material comprises etching the spacer material with a wet etching chemistry comprising diluted hydrofluoric acid (DHF) with a dilution ratio between about 100:1 and about 500:1.

### Claim 17 (depends on 8)

The method of claim 8, wherein the post-deposition treatment comprises a thermal-only treatment, an ultra-violet (UV) treatment, or a remote plasma treatment.

### Claim 18

A structure, comprising:
a pair of epitaxial structures on a substrate;
vertically-stacked nanostructures between the pair of epitaxial structures, wherein the vertically-stacked nanostructures are in contact with the pair of epitaxial structures;
a gate structure surrounding first portions of the vertically-stacked nanostructures between the pair of epitaxial structures;
a first gate spacer above the vertically-stacked nanostructures and on sidewall surfaces of the gate structure, wherein the first gate spacer has a first density;
a second gate spacer on sidewall surfaces of the first gate spacer and in contact with the pair of epitaxial structures; and
spacer structures between second portions of the vertically-stacked nanostructures and interposed between the gate structure and sidewall portions of the pair of epitaxial structures, wherein the spacer structures comprise:
a spacer layer with a uniform thickness and having a second density different the first density; and
an air gap surrounded by the spacer layer and the sidewall portions of the pair of epitaxial structures.

### Claim 19 (depends on 18)

The structure of claim 18, wherein the air gap is spaced apart from the gate structures by the spacer layer.

### Claim 20 (depends on 18)

The structure of claim 18, wherein:
the first density of the first gate spacer is greater than the second density of the spacer layer in the spacer structures; and
the second gate spacer comprises an oxygen-free dielectric material.