# US 11,908,907 B2 · VFET contact formation

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- Number: US 11,908,907 B2
- Document ID: US11908907B2
- Status: Granted
- Kind: B2
- Application number: 17/118,853
- Filed: 2020-12-11
- Published: 2022-06-16
- Granted: 2024-02-20
- Earliest claimed: 2020-12-11
- Assignees: International Business Machines Corporation
- Applicants: International Business Machines Corporation
- Inventors: Heng Wu; Ruilong Xie; Tian Shen; Kai Zhao
- Web page: https://patentgrep.com/patent/US11908907B2

## CPC

- H10D 64/252: {for vertical or pseudo-vertical devices}
- H10D 30/025: {of vertical IGFETs (of VDMOS H10D30/0291; of vertical TFTs H10D30/0318)}
- H10D 30/63: Vertical IGFETs (H10D30/66 {, H10D30/6728, H10D30/689, H10D30/693} take precedence)
- H10D 64/62: Electrodes ohmically coupled to a semiconductor
- H10D 84/017: {Manufacturing their source or drain regions, e.g. silicided source or drain regions}
- H10D 84/0186: {Manufacturing their interconnections or electrodes, e.g. source or drain electrodes}
- H10D 84/0195: {the components including vertical IGFETs}
- H10D 84/038: {using silicon technology, e.g. SiGe}
- H10D 84/85: Complementary IGFETs, e.g. CMOS
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

An embodiment of the invention may include a Vertical Field Effect Transistor (VFET) structure, and method of making that structure, having a first VFET and a second VFET. The first VFET may include a single liner between a first source/drain epi and a contact. The second VFET may include two liners between a second source/drain epi and a contact. This may enable proper contact liner matching for differing VFET devices.

## Claims

### Claim 1

A semiconductor device comprising:
a first Vertical Field Effect Transistor (VFET) comprising a first top source drain epi, a first silicide, a first contact liner and a first contact each arranged in direct contact one on top of another, wherein the first silicide consists of elements of the first top source drain epi and the first contact liner; and
a second VFET comprising a second top source drain epi, a second silicide, a metal contact, a second contact liner and a second contact, wherein the second silicide consists of elements of the second top source drain epi and the metal contact,
wherein the metal contact is physically arranged between the second silicide from the second contact liner, and wherein a bottommost surface of the metal contact is entirely below a topmost surface of the second silicide, and wherein a bottommost surface of the first contact liner directly contacts a top surface of the first silicide, and wherein the first contact liner and the second contact liner comprise identical elements.

### Claim 2 (depends on 1)

The semiconductor device of claim 1, wherein the metal contact surrounds a top and at least two sides of the second silicide.

### Claim 3 (depends on 1)

The semiconductor device of claim 1, wherein a bottommost surface of the first contact liner directly contacts a top surface of the first silicide, and wherein a bottommost surface of the first contact liner is above a topmost surface of the first silicide.

### Claim 4 (depends on 1)

The semiconductor device of claim 1, wherein the first contact liner physically separates the first silicide from the first contact.

### Claim 5 (depends on 1)

The semiconductor device of claim 1, wherein a bottommost surface of the first contact liner is below a bottommost surface of the second contact liner.

### Claim 6 (depends on 1)

The semiconductor device of claim 1, wherein the first VFET comprises a pFET, and wherein the second VFET comprises an nFET.

### Claim 7 (depends on 1)

The semiconductor device of claim 1, wherein the first contact liner and the second contact liner are both a PFET liner, and the metal contact is titanium.

### Claim 8 (depends on 1)

The semiconductor device of claim 1, wherein a width of the first silicide is substantially equal to a width of the first source drain epi, and wherein a width of the second silicide is substantially equal to a width of the second source drain epi.

### Claim 9

A semiconductor device comprising:
a first Vertical Field Effect Transistor (VFET) comprising a first top source drain epi, a first silicide, a first contact liner and a first contact, wherein the first silicide comprises elements of the first top source drain epi and the first contact liner; and
a second VFET comprising a second top source drain epi, a second silicide, a metal contact, a second contact liner and a second contact, wherein the second silicide comprises elements of the second top source drain epi and the metal contact,
wherein a bottommost surface of the second liner is entirely above a topmost surface of the metal contact, and wherein a bottommost surface of the first contact liner directly contacts a top surface of the first silicide, and wherein the first contact liner and the second contact liner comprise identical elements.

### Claim 10 (depends on 9)

The semiconductor device of claim 9, wherein the metal contact surrounds a top and at least two sides of the second silicide.

### Claim 11 (depends on 9)

The semiconductor device of claim 9, wherein a bottommost surface of the first contact liner directly contacts a top surface of the first silicide, and wherein a bottommost surface of the first contact liner is above a topmost surface of the first silicide.

### Claim 12 (depends on 9)

The semiconductor device of claim 9, wherein the first contact liner physically separates the first silicide from the first contact.

### Claim 13 (depends on 9)

The semiconductor device of claim 9, wherein a bottommost surface of the first contact liner is below a bottommost surface of the second contact liner.

### Claim 14 (depends on 9)

The semiconductor device of claim 9, wherein the first contact liner and the second contact liner are both a PFET liner, and the metal contact is titanium.

### Claim 15 (depends on 9)

The semiconductor device of claim 9, wherein a width of the first silicide is substantially equal to a width of the first source drain epi, and wherein a width of the second silicide is substantially equal to a width of the second source drain epi.

### Claim 16

A semiconductor device comprising:
a first Vertical Field Effect Transistor (VFET) comprising a first top source drain epi, a first silicide, a first contact liner and a first contact each arranged one on top of another, wherein the first contact is directly on the first contact liner, the first contact liner is directly on the first silicide, and the first silicide is directly on the first top source drain epi; and
a second VFET comprising a second top source drain epi, a second silicide, a metal contact, a second contact liner and a second contact each arranged one on top of another, wherein the second contact is directly on the second contact liner, the second contact liner is directly on the metal contact, the metal contact is directly on the second silicide, and the second silicide is directly on the first top source drain epi,
wherein the first contact liner and the second contact liner comprise identical elements.

### Claim 17 (depends on 16)

The semiconductor device of claim 16, wherein the metal contact surrounds a top and at least two sides of the second silicide.

### Claim 18 (depends on 16)

The semiconductor device of claim 16, wherein a bottommost surface of the first contact liner is above a topmost surface of the first silicide.

### Claim 19 (depends on 16)

The semiconductor device of claim 16, wherein the first contact liner physically separates the first silicide from the first contact.

### Claim 20 (depends on 16)

The semiconductor device of claim 16, wherein a bottommost surface of the first contact liner is below a bottommost surface of the second contact liner.

### Claim 21 (depends on 16)

The semiconductor device of claim 16, wherein the first VFET comprises a pFET, and wherein the second VFET comprises an nFET.

### Claim 22 (depends on 16)

The semiconductor device of claim 16, wherein the first contact liner and the second contact liner are both a PFET liner, and the metal contact is titanium.

### Claim 23 (depends on 16)

The semiconductor device of claim 16, wherein a width of the first silicide is substantially equal to a width of the first source drain epi, and wherein a width of the second silicide is substantially equal to a width of the second source drain epi.