US 11,908,868 B2Granted

Semiconductor device

AssigneeRohm Co., Ltd.

InventorsKatsuhisa Nagao, Noriaki Kawamoto

Life of this patent

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Abstract

A semiconductor device (1) is manufactured which includes a SiC epitaxial layer (28), a plurality of transistor cells (18) that are formed in the SiC epitaxial layer (28) and that are subjected to ON/OFF control by a predetermined control voltage, a gate electrode (19) that faces a channel region (32) of the transistor cells (18) in which a channel is formed when the semiconductor device (1) is in an ON state, a gate metal (44) that is exposed at the topmost surface for electrical connection with the outside and that is electrically connected to the gate electrode (19) while being physically separated from the gate electrode (19), and a built-in resistor (21) that is made of polysilicon and that is disposed below the gate metal (44) so as to electrically connect the gate metal (44) and the gate electrode (19) together.

Claims15

Dependent claims

A semiconductor device comprising:

a semiconductor layer;
a plurality of cells that are formed in the semiconductor layer;
a control pad for electric connection for controlling the semiconductor device,
a pad peripheral portion formed around the control pad to surround the control pad continuously;
a built-in resistor that is disposed partly below the control pad and that is made of polysilicon, the built-in resistor electrically connecting the control pad with the pad peripheral portion;
and
a plurality of source pads for electric connection,
wherein the control pad is isolated from the pad peripheral portion physically in a same layer so that a space is formed between the control pad and the pad peripheral portion, and the control pad is formed around the edge portion of the semiconductor device,
a connecting portion to which a connecting member is adapted to be connected is selectively formed on a surface of the control pad, and
the built-in resistor is selectively disposed in a region that avoids the connecting portion in a plain view,
wherein the control pad is made of a material containing aluminum, the pad peripheral portion is made of a material containing aluminum, and each of said source pads is made of a material containing aluminum.

8 more elements

Dependencies are inferred from the claim text.

Facts

Application: 17/748,633Filed 19 May 2022 · continuation
Priority: JP 2013-24647428 Nov 2013
Published: US 2022/0278133 A11 Sep 2022
Granted: 20 Feb 2024
Term ends: Not estimatedThe source records don’t support an estimate.

Classification24 codes

H10D 84/998
Masterslice integrated circuits: input and output buffer/driver structures
H10D 12/441
Insulated-gate bipolar transistors [IGBT]: vertical IGBTs
H10D 12/481
Having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions: having gate…
H10D 30/665
Vertical dmos [vdmos] fets: having edge termination structures

Family

PCT/JP2014/081273Parent of this division · filed 26 Nov 2014
Application15/883,690Parent of this continuation · filed 30 Jan 2018
US 9,917,102 B2Parent of this division · filed 13 Mar 2018
Application16/555,843Parent of this continuation · filed 29 Aug 2019
US 10,438,971 B2Parent of this continuation · filed 8 Oct 2019
Application17/109,676Parent of this continuation · filed 2 Dec 2020
US 10,886,300 B2Parent of this continuation · filed 5 Jan 2021
US 2022/0278133 A1Pre-grant publication · published 1 Sep 2022
US 11,367,738 B2Parent of this continuation
Application15/039,725Parent of this division
Application15/883,690Parent of this division
US 2016/0379992 A1Published application
US 2018/0175062 A1Published application
US 2019/0386025 A1Published application
US 2021/0091117 A1Published application
US 11,908,868 B2This patent

From the US filing history. Foreign family members aren’t listed.