# US 11,908,844 B2 · Multilayer power, converter with devices having reduced lateral current

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- Number: US 11,908,844 B2
- Document ID: US11908844B2
- Status: Granted
- Kind: B2
- Application number: 17/452,275
- Filed: 2021-10-26
- Published: 2022-06-02
- Granted: 2024-02-20
- Earliest claimed: 2011-10-18
- Assignees: pSemi Corporation
- Applicants: pSemi Corporation
- Inventors: David Giuliano
- Web page: https://patentgrep.com/patent/US11908844B2

## CPC

- H10W 90/00: Package configurations
- H02M 3/07: using capacitors charged and discharged alternately by semiconductor devices with control electrode {, e.g. charge pumps}
- H05K 1/0298: {Multilayer circuits}
- H05K 1/115: {Via connections; Lands around holes or via connections (H05K1/112 takes precedence)}
- H10D 1/68: Capacitors having no potential barriers
- H10D 1/716: {having vertical extensions}
- H10D 86/85: characterised by only passive components
- H10D 88/00: Three-dimensional [3D] integrated devices
- H10N 19/00: Integrated devices, or assemblies of multiple devices, comprising at least one thermoelectric or thermomagnetic element covered by groups H10N10/00 - H10N15/00
- H10W 20/20: Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
- H10W 20/496: {Capacitor integral with wiring layers}
- H10W 20/497: {Inductive arrangements or effects of, or between, wiring layers}
- H10W 44/00: Electrical arrangements for controlling or matching impedance
- H10W 44/601: {Capacitive arrangements (H10W44/20 takes precedence)}
- H02M 3/077: {with parallel connected charge pump stages}
- H10W 72/29: Bond pads specially adapted therefor
- H10W 72/923: {Bond pads having multiple stacked layers}
- H10W 72/9415: {relative to the surface, e.g. recessed, protruding}
- H10W 72/942: {relative to underlying supporting features, e.g. bond pads, RDLs or vias}
- H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 90/728: {between a chip and a stacked discrete passive device, e.g. resistors, capacitors or inductors}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P)
- H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR

## Abstract

This disclosure relates to embodiments that include an apparatus that may comprise a first layer including a first plurality of active devices, a second layer including a second plurality of active devices, and/or a third layer including a plurality of passive devices and disposed between the first and the second layers. An active device of the first plurality of active devices and an active device of the second plurality of active devices may influence a state of charge of a passive device of the plurality of passive devices.

## Claims

### Claim 1

An apparatus comprising:
a first layer including a first plurality of active devices;
a second layer including a second plurality of active devices; and
a third layer including a plurality of passive devices and disposed between the first and the second layers,
wherein an active device of the first plurality of active devices and an active device of the second plurality of active devices influence a state of charge of a passive device of the plurality of passive devices.

### Claim 2 (depends on 1)

The apparatus of claim 1, further comprising an interconnect layer to electrically connect the first plurality of active devices, the second plurality of active devices, and the plurality of passive devices, wherein the interconnect layer is disposed between the first layer and the third layer.

### Claim 3 (depends on 2)

The apparatus of claim 2, wherein the interconnect layer is disposed between the second layer and the third layer.

### Claim 4 (depends on 2)

The apparatus of claim 2, further comprising one or more through-hole vias to enable an electrical connection between the first layer, the second layer, and the third layer through the interconnect layer.

### Claim 5 (depends on 1)

The apparatus of claim 1, wherein each of the first and the second plurality of active devices includes switches.

### Claim 6 (depends on 1)

The apparatus of claim 1, wherein the first plurality of active devices includes a plurality of stack switches and the second plurality of active devices include a plurality of phase switches.

### Claim 7 (depends on 6)

The apparatus of claim 6, wherein the plurality of stack switches is electrically connected to a positive terminal of the passive device.

### Claim 8 (depends on 6)

The apparatus of claim 6, wherein the plurality of phase switches is electrically connected to a negative terminal of the passive device.

### Claim 9 (depends on 1)

The apparatus of claim 1, wherein the passive device of the plurality of passive devices comprises a capacitor.

### Claim 10 (depends on 9)

The apparatus of claim 9, wherein the capacitor comprises a fly capacitor.

### Claim 11 (depends on 1)

The apparatus of claim 1, further comprising driver circuitry and control circuitry to supply power to the first and the second plurality of active devices.

### Claim 12

An integrated circuit comprising:
a first layer including at least two passive devices;
a second layer including at least four active devices to influence a state of charge of a passive device of the at least two passive devices; and
an interconnect layer disposed between the first and the second layer to electrically connect the two passive devices and the four active devices to form a DC-to-DC power converter.

### Claim 13 (depends on 12)

The integrated circuit of claim 12, wherein the at least four active devices comprise a first switch, a second switch, a third switch, and a fourth switch.

### Claim 14 (depends on 13)

The integrated circuit of claim 13, wherein the second layer further comprises a fifth switch and a sixth switch.

### Claim 15 (depends on 14)

The integrated circuit of claim 14, wherein the first layer includes at least two fly capacitors.

### Claim 16 (depends on 15)

The integrated circuit of claim 15, wherein the first switch, the second switch, the third switch, the fourth switch, and one of the at least two fly capacitors are electrically connected to form a charge pump.

### Claim 17 (depends on 15)

The integrated circuit of claim 15, wherein the first switch, the second switch, the third switch, the fourth switch, and one of the at least two fly capacitors are electrically connected to form a multi-level power converter.

### Claim 18 (depends on 12)

The integrated circuit of claim 12, further comprising one or more through-hole vias to enable an electrical connection between the first layer and the second layer through the interconnect layer.

### Claim 19 (depends on 12)

The integrated circuit of claim 12, further comprising driver circuitry and control circuitry to supply power to the plurality of active devices.

### Claim 20

A method of forming an apparatus, the method comprising:
forming a first layer including a first plurality of active devices;
forming a second layer including a second plurality of active devices; and
forming a third layer including a plurality of passive devices and disposed between the first and the second layers,
wherein an active device of the first plurality of active devices and an active device of the second plurality of active devices influence a state of charge of a passive device of the plurality of passive devices.

### Claim 21 (depends on 20)

The method of claim 20, further comprising forming an interconnect layer to electrically connect the first plurality of active devices, the second plurality of active devices, and the plurality of passive devices, wherein the interconnect layer is formed between the first layer and the third layer.

### Claim 22 (depends on 20)

The method of claim 20, wherein the first plurality of active devices includes a plurality of stack switches and the second plurality of active devices includes a plurality of phase switches.

### Claim 23 (depends on 22)

The method of claim 22, wherein the plurality of stack switches is electrically connected to a positive terminal of the passive device, and wherein the plurality of phase switches is electrically connected to a negative terminal of the passive device.

### Claim 24

A method of forming an integrated circuit, the method comprising:
forming a first layer including at least two passive devices;
forming a second layer including at least four active devices to influence a state of charge of a passive device of the at least two passive devices; and
forming an interconnect layer disposed between the first and the second layer to electrically connect the two passive devices and the four active devices.

### Claim 25 (depends on 24)

The method of claim 24, wherein the at least four active devices comprise a first switch, a second switch, a third switch, and a fourth switch.

### Claim 26 (depends on 25)

The method of claim 25, wherein the second layer further comprises a fifth switch and a sixth switch.

### Claim 27 (depends on 24)

The method of claim 24, wherein the first layer includes at least two fly capacitors.

### Claim 28 (depends on 27)

The method of claim 27, wherein the first switch, the second switch, the third switch, the fourth switch, and one of the at least two fly capacitors are electrically connected to form a charge pump.

### Claim 29 (depends on 27)

The method of claim 27, wherein the first switch, the second switch, the third switch, the fourth switch, and one of the at least two fly capacitors are electrically connected to form a multi-level power converter.