# US 11,908,814 B2 · Fabricated two-sided millimeter wave antenna using through-silicon-vias

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- Number: US 11,908,814 B2
- Document ID: US11908814B2
- Status: Granted
- Kind: B2
- Application number: 17/328,134
- Filed: 2021-05-24
- Published: 2021-09-09
- Granted: 2024-02-20
- Earliest claimed: 2018-08-31
- Assignees: Micron Technology, Inc.
- Applicants: Micron Technology, Inc.
- Inventors: John F. Kaeding; Owen R. Fay
- Web page: https://patentgrep.com/patent/US11908814B2

## CPC

- H10W 44/20: at high-frequency [HF] or radio frequency [RF]
- H01Q 1/2283: {mounted in or on the surface of a semiconductor substrate as a chip-type antenna or integrated with other components into an IC package}
- H01Q 25/00: Antennas or antenna systems providing at least two radiating patterns (arrangements for changing or varying the orientation or the shape of the directional pattern H01Q3/00)
- H10B 12/00: Dynamic random access memory [DRAM] devices
- H10W 70/611: {for connecting multiple chips together}
- H10W 70/635: {Through-vias}
- H10W 72/90: Bond pads, in general
- H10W 90/00: Package configurations
- H01Q 21/28: Combinations of substantially independent non-interacting antenna units or systems {(multiple beam H01Q25/00)}
- H10W 44/248: {for antennas}
- H10W 70/60: Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40)
- H10W 70/65: Shapes or dispositions of interconnections
- H10W 72/241: {Dispositions, e.g. layouts}
- H10W 90/297: {characterised by the through-semiconductor vias [TSVs] in the stacked chips}
- H10W 90/722: {between stacked chips}
- H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H01Q: ANTENNAS, i.e. RADIO AERIALS (radiators or antennas for microwave heating H05B6/72)
- H10B: ELECTRONIC MEMORY DEVICES

## Abstract

A system may include a first semiconductor substrate having a first side and a second side opposite the first side. The system may further include multiple device layers positioned on the first side of the substrate. The system may also include a first portion of an antenna structure positioned within at least one of the multiple device layers. The system may include a second portion of the antenna structure positioned over the second side of the substrate. The system may further include a via passing through the substrate and electrically coupling the first portion of the antenna structure to the second portion of the antenna structure.

## Claims

### Claim 1

A semiconductor device comprising:
a semiconductor substrate having an active surface and a back surface opposite the active surface;
one or more metallization layers adjacent the active surface;
a first portion of an antenna structure formed within one of the one or more metallization layers;
a second portion of the antenna structure adjacent the back surface; and
a through substrate via extending between and electrically coupling the first portion of the antenna structure to the second portion of the antenna structure,
wherein the first and second portions of the antenna structure collectively define a single millimeter wave antenna.

### Claim 2 (depends on 1)

The semiconductor device of claim 1, further comprising:
one or more intervening layers between the second portion of the antenna structure and the semiconductor substrate.

### Claim 3 (depends on 2)

The semiconductor device of claim 2, wherein the one or more intervening layers comprise a radio frequency shielding layer, an insulation barrier, or a combination thereof.

### Claim 4 (depends on 1)

The semiconductor device of claim 1, further comprising transmitter circuitry, receiver circuitry, transceiver circuitry, or a combination thereof, formed adjacent the active surface.

### Claim 5 (depends on 4)

The semiconductor device of claim 4, wherein the transmitter circuitry, the receiver circuitry, the transceiver circuitry, or the combination thereof is communicatively coupled with the antenna structure.

### Claim 6 (depends on 1)

The semiconductor device of claim 1, further comprising memory circuitry, processor circuitry, or a combination thereof.

### Claim 7 (depends on 1)

The semiconductor device of claim 1, wherein the first semiconductor substrate is a silicon substrate.

### Claim 8

A semiconductor device assembly comprising:
a first semiconductor substrate including:
a first active surface and a first back surface opposite the first active surface, a first through substrate via extending from the first active surface to the first back surface, one or more metallization layers adjacent the first active surface, and
a first portion of an antenna structure formed within one of the one or more metallization layers; and
a second semiconductor substrate including:
a second active surface and a second back surface opposite the second active surface, the second active surface facing the first back surface of the first semiconductor device,
a second through substrate via extending from the second active surface to the second back surface, and
a second portion of the antenna structure adjacent the second back surface,
wherein the first portion of the antenna structure is electrically coupled to the second portion of the antenna structure by the first through substrate via and the second through substrate via.

### Claim 9 (depends on 8)

The semiconductor device assembly of claim 8, further comprising:
one or more intervening layers between the second portion of the antenna structure and the second semiconductor substrate.

### Claim 10 (depends on 9)

The semiconductor device assembly of claim 9, wherein the one or more intervening layers comprise a radio frequency shielding layer, an insulation barrier, or a combination thereof.

### Claim 11 (depends on 8)

The semiconductor device assembly of claim 8, further comprising transmitter circuitry, receiver circuitry, transceiver circuitry, or a combination thereof, formed adjacent the first active surface and/or the second active surface.

### Claim 12 (depends on 11)

The semiconductor device assembly of claim 11, wherein the transmitter circuitry, the receiver circuitry, the transceiver circuitry, or the combination thereof is communicatively coupled with the antenna structure.

### Claim 13 (depends on 8)

The semiconductor device assembly of claim 8, wherein the antenna structure is a millimeter wave antenna.

### Claim 14 (depends on 8)

The semiconductor device assembly of claim 8, further comprising:
one or more intervening semiconductor devices positioned between the first semiconductor substrate and the second semiconductor substrate, each of the intervening semiconductor devices having a substrate and a via passing through the substrate, wherein the first portion of the antenna structure is electrically coupled to the second portion of the antenna structure by the via.

### Claim 15

A method comprising:
forming a semiconductor substrate having an active surface and a back surface opposite the active surface;
forming a through substrate via extending between the active surface and the back surface;
forming one or more metallization layers adjacent the active surface of the semiconductor substrate;
forming a first portion of an antenna structure within one of the one or more metallization layers; and
forming a second portion of the antenna structure adjacent the back surface of the semiconductor substrate,
wherein the through substrate via electrically couples the first portion of the antenna structure to the second portion of the antenna structure, and
wherein the first and second portions of the antenna structure collectively define a single millimeter wave antenna.

### Claim 16 (depends on 15)

The method of claim 15, further comprising:
depositing one or more intervening layers between the second portion of the antenna structure and the semiconductor substrate.

### Claim 17 (depends on 15)

The method of claim 15, wherein forming the one or more metallization layers comprises:
forming a first sublayer and a second sublayer, the first sublayer configured to route a set of connections from the semiconductor substrate to a surface mount coupling structure, the second sublayer including the first portion of the antenna structure.

### Claim 18 (depends on 15)

The method of claim 15, further comprising forming transmitter circuitry, receiver circuitry, transceiver circuitry, or a combination thereof, adjacent the active surface of the semiconductor substrate.

### Claim 19 (depends on 18)

The method of claim 18, further comprising communicatively coupling the transmitter circuitry, the receiver circuitry, the transceiver circuitry, or the combination thereof with the antenna structure.