# US 11,908,808 B2 · Monolithic microwave integrated circuit (MMIC) with embedded transmission line (ETL) ground shielding > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,908,808 B2 - Document ID: US11908808B2 - Status: Granted - Kind: B2 - Application number: 18/097,901 - Filed: 2023-01-17 - Published: 2023-08-10 - Granted: 2024-02-20 - Earliest claimed: 2018-12-04 - Assignees: Qorvo US, Inc. - Applicants: Qorvo US, Inc. - Inventors: Andrew Arthur Ketterson - Web page: https://patentgrep.com/patent/US11908808B2 ## CPC - H10W 42/20: protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons - H10W 70/635: {Through-vias} - H10W 20/20: Interconnections within wafers or substrates, e.g. through-silicon vias [TSV] - H10W 40/22: characterised by their shape, e.g. having conical or cylindrical projections - H10W 42/267: {Patterned shielding planes} - H10W 44/20: at high-frequency [HF] or radio frequency [RF] - H10W 70/611: {for connecting multiple chips together} - H10W 70/685: comprising multiple insulating layers - H10W 90/293: {characterised by non-galvanic coupling between the chips, e.g. capacitive coupling} - H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts} - H10W 44/209: {Vertical interconnections, e.g. vias} - H10W 44/216: {Waveguides, e.g. strip lines} - H10W 44/251: {for monolithic microwave integrated circuits [MMIC]} - H10W 70/60: Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40) - H10W 70/655: Fan-out layouts - H10W 74/117: {the substrate having spherical bumps for external connection} - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract A monolithic microwave integrated circuit (MMIC) with embedded transmission line (ETL) ground shielding is provided. In an exemplary aspect, an ETL MMIC according to this disclosure includes a MMIC substrate having an active side, an ETL dielectric layer covering the active side, and a topside ground plane over the ETL dielectric layer. The active side includes one or more transmission lines or other components which may undesirably couple to metal signal lines (e.g., package metal interconnects) in an external circuit assembly. The topside ground plane in the ETL MMIC provides shielding to reduce such electromagnetic coupling. The topside ground plane can also facilitate improved thermal paths for heat dissipation, such as through a redistribution layer (RDL) to a next higher assembly (NHA) and/or through a backside ground plane of the MMIC substrate. ## Claims ### Claim 1 A method for packaging a monolithic microwave integrated circuit (MMIC), the method comprising: forming a MMIC substrate having an active side comprising a transmission line; and forming an embedded transmission line (ETL) MMIC by: embedding the transmission line in an ETL dielectric layer deposited over the MMIC substrate; and depositing a topside ground plane over the ETL dielectric layer; wherein the topside ground plane is configured to reduce electromagnetic coupling between the transmission line of the active side and an external circuit assembly. ### Claim 2 (depends on 1) The method of claim 1, further comprising spinning the ETL dielectric layer over the active side of the MMIC substrate. ### Claim 3 (depends on 1) The method of claim 1, further comprising depositing the ETL dielectric layer over the active side of the MMIC substrate by vapor deposition or chemical vapor deposition. ### Claim 4 (depends on 1) The method of claim 1, further comprising spray coating the ETL dielectric layer over the active side of the MMIC substrate. ### Claim 5 (depends on 1) The method of claim 1, further comprising laminating the ETL dielectric layer and the topside ground plane over the active side of the MMIC substrate. ### Claim 6 (depends on 1) The method of claim 1, further comprising attaching the external circuit assembly to the ETL MMIC. ### Claim 7 (depends on 6) The method of claim 6, further comprising connecting a signal line of a redistribution layer (RDL) in the external circuit assembly to the transmission line. ### Claim 8 (depends on 7) The method of claim 7, further comprising connecting the RDL to a Next Higher Assembly (NHA). ### Claim 9 (depends on 7) The method of claim 7, wherein forming the MMIC substrate further comprises forming a backside ground plane on the MMIC substrate. ### Claim 10 (depends on 9) The method of claim 9, further comprising coupling the RDL to the backside ground plane. ### Claim 11 (depends on 7) The method of claim 7, wherein the NHA comprises at least one of a printed circuit board, an interposer, and a chip-scale package. ### Claim 12 (depends on 6) The method of claim 6, further comprising connecting a signal line of a fine pitch ball grid array (FBGA) in the external circuit assembly to the transmission line of the MMIC substrate. ### Claim 13 (depends on 1) The method of claim 1, wherein forming the MMIC substrate further comprises surrounding the MMIC substrate with an overmold layer. ### Claim 14 (depends on 13) The method of claim 13, further comprising: exposing a surface of the MMIC substrate through the overmold layer; forming a redistribution layer (RDL) on the exposed surface of the MMIC substrate; connecting a signal line of the RDL to the transmission line of the MMIC substrate. ### Claim 15 A method for packaging a monolithic microwave integrated circuit (MMIC), the method comprising: forming a MMIC substrate having an active side; depositing an embedded transmission line (ETL) dielectric layer over the MMIC substrate; embedding a transmission line in the ETL dielectric layer deposited over the MMIC substrate; forming a ground plane on the active side of the MMIC substrate such that the ground plane sets a ground reference for the transmission line. ### Claim 16 (depends on 15) The method of claim 15, further comprising connecting a signal line of a redistribution layer (RDL) to the transmission line. ### Claim 17 (depends on 16) The method of claim 16, further comprising connecting the RDL to a Next Higher Assembly (NHA). ### Claim 18 (depends on 16) The method of claim 16, further comprising forming a backside ground plane on a backside of the MMIC substrate, the backside of the MMIC substrate being oppositely disposed to the active side. ### Claim 19 (depends on 18) The method of claim 18, further comprising coupling the RDL to the backside ground plane. ### Claim 20 (depends on 15) The method of claim 15, further comprising connecting a signal line of a fine pitch ball grid array (FBGA) to the transmission line.