# US 11,908,807 B2 · Semiconductor device including well region > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,908,807 B2 - Document ID: US11908807B2 - Status: Granted - Kind: B2 - Application number: 17/574,212 - Filed: 2022-01-12 - Published: 2022-12-15 - Granted: 2024-02-20 - Earliest claimed: 2021-06-14 - Assignees: Samsung Electronics Co., Ltd. - Applicants: Samsung Electronics Co., Ltd. - Inventors: Huichul Shin; Hyungjin Lee; Jinhong Park; Mingeun Song; Euiyoung Jeong; Hiroki Fujii - Web page: https://patentgrep.com/patent/US11908807B2 ## CPC - H10W 42/20: protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons - H10W 42/00: Arrangements for protection of devices (arrangements for thermal protection H10W40/00) - H10W 44/20: at high-frequency [HF] or radio frequency [RF] - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract A semiconductor device is provided. The semiconductor device includes: a substrate with first-conductivity-type impurities; first and second active regions provided on the substrate; a first deep element isolation layer surrounding the first active region; a second deep element isolation layer surrounding the second active region; a suction region surrounding the first and second deep element isolation layers, the suction region including the first-conductivity-type impurities; a well region provided in the substrate between the first and second active regions, the well region including second-conductivity-type impurities different from the first-conductivity-type impurities; a shallow element isolation layer provided between the suction region and the well region; and a guard structure connected to the suction region. The substrate includes a signal path portion that is provided between a top surface of the substrate and the well region, and surrounds an upper portion of the well region. ## Claims ### Claim 1 A semiconductor device comprising: a substrate comprising first-conductivity-type impurities; a first active region and a second active region provided on the substrate; a first deep element isolation layer surrounding the first active region; a second deep element isolation layer surrounding the second active region; a suction region surrounding the first deep element isolation layer and the second deep element isolation layer, the suction region comprising the first-conductivity-type impurities; a well region provided in the substrate between the first active region and the second active region, the well region comprising second-conductivity-type impurities different from the first-conductivity-type impurities; a shallow element isolation layer provided between the suction region and the well region; and a guard structure connected to the suction region, wherein the substrate comprises a signal path portion that is provided between a top surface of the substrate and the well region, and surrounds an upper portion of the well region. ### Claim 2 (depends on 1) The semiconductor device according to claim 1, wherein the signal path portion comprises a first path portion and a second path portion, wherein the first path portion is provided above an upper surface of the well region, and the second path portion provided below the upper surface of the well region. ### Claim 3 (depends on 2) The semiconductor device according to claim 2, wherein: the well region is spaced apart from the shallow element isolation layer; and the second path portion is provided between the well region and the shallow element isolation layer. ### Claim 4 (depends on 1) The semiconductor device according to claim 1, wherein: the well region is spaced apart from the shallow element isolation layer; and a minimum distance between the shallow element isolation layer and the well region is smaller than a maximum width of the shallow element isolation layer along a first direction parallel to the top surface of the substrate. ### Claim 5 (depends on 1) The semiconductor device according to claim 1, wherein a minimum distance between the top surface of the substrate corresponding to the signal path portion and an upper surface of the well region is smaller than a maximum width of the shallow element isolation layer along a first direction parallel to the top surface of the substrate. ### Claim 6 (depends on 1) The semiconductor device according to claim 1, wherein a concentration of the first-conductivity-type impurities in the suction region is higher than a concentration of the first-conductivity-type impurities in the substrate. ### Claim 7 (depends on 1) The semiconductor device according to claim 1, wherein: the guard structure comprises first guard vias and second guard vias provided on the suction region, and a first guard line provided on both the first guard vias and the second guard vias; and an outer longer side wall of one of the first guard vias faces inner longer side walls of two of the second guard vias. ### Claim 8 (depends on 1) The semiconductor device according to claim 1, wherein: the well region comprises a plurality of well regions; and the suction region comprises a plurality of suction regions provided between two of the plurality of well regions that are adjacent to each other. ### Claim 9 A semiconductor device comprising: a substrate comprising first-conductivity-type impurities; a first active region and a second active region provided on the substrate; a suction region surrounding the first active region and the second active region, the suction region comprising the first-conductivity-type impurities; and a well region provided in the substrate between the first active region and the second active region, the well region comprising second-conductivity-type impurities different from the first-conductivity-type impurities, wherein the well region is spaced apart from a top surface of the substrate and the suction region, and wherein a minimum distance between the well region and the top surface of the substrate is smaller than a width of the suction region along a first direction parallel to the top surface of the substrate. ### Claim 10 (depends on 9) The semiconductor device according to claim 9, wherein: the substrate comprises a first path portion provided between the top surface of the substrate and the well region; and the first path portion comprises the first-conductivity-type impurities. ### Claim 11 (depends on 10) The semiconductor device according to claim 10, wherein the first path portion covers an uppermost portion of the well region that faces the top surface of the substrate. ### Claim 12 (depends on 9) The semiconductor device according to claim 9, further comprising: a guard structure connected to the suction region. ### Claim 13 (depends on 12) The semiconductor device according to claim 12, wherein the guard structure is connected to a ground node. ### Claim 14 (depends on 9) The semiconductor device according to claim 9, further comprising: a shallow element isolation layer provided between the suction region and the well region. ### Claim 15 (depends on 14) The semiconductor device according to claim 14, wherein the substrate comprises a first path portion and a second path portion, wherein the first path portion is provided between the top surface of the substrate and the well region, and the second path portion is provided between the shallow element isolation layer and the well region. ### Claim 16 (depends on 14) The semiconductor device according to claim 14, wherein a minimum distance between the well region and the shallow element isolation layer is smaller than the width of the suction region. ### Claim 17 A semiconductor device comprising: a substrate comprising first-conductivity-type impurities; an active region provided on the substrate; a suction region surrounding the active region and comprising the first-conductivity-type impurities; and a guard structure connected to the suction region, wherein the guard structure comprises first guard vias and second guard vias provided on the suction region, and a first guard line provided on the first guard vias and the second guard vias, and wherein an outer longer side wall of one of the first guard vias faces inner longer side walls of two of the second guard vias. ### Claim 18 (depends on 17) The semiconductor device according to claim 17, wherein the guard structure is connected to a ground node. ### Claim 19 (depends on 17) The semiconductor device according to claim 17, wherein shorter side walls of two of the first guard vias face each other. ### Claim 20 (depends on 17) The semiconductor device according to claim 17, further comprising: a well region provided in the substrate, wherein the well region comprises second-conductivity-type impurities different from the first-conductivity-type impurities.