# US 11,908,787 B2 · Package structure and method of manufacturing the same

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- Number: US 11,908,787 B2
- Document ID: US11908787B2
- Status: Granted
- Kind: B2
- Application number: 17/676,826
- Filed: 2022-02-22
- Published: 2022-06-09
- Granted: 2024-02-20
- Earliest claimed: 2019-07-17
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Company, Ltd.
- Inventors: Chuei-Tang Wang; Chun-Lin Lu; Kai-Chiang Wu
- Web page: https://patentgrep.com/patent/US11908787B2

## CPC

- H10W 70/65: Shapes or dispositions of interconnections
- H01Q 1/2283: {mounted in or on the surface of a semiconductor substrate as a chip-type antenna or integrated with other components into an IC package}
- H01Q 1/40: Radiating elements coated with or embedded in protective material
- H01Q 9/0407: {Substantially flat resonant element parallel to ground plane, e.g. patch antenna (dipole H01Q9/285; monopole H01Q9/40)}
- H01Q 9/16: with feed intermediate between the extremities of the antenna, e.g. centre-fed dipole (H01Q9/44 takes precedence)
- H01Q 21/28: Combinations of substantially independent non-interacting antenna units or systems {(multiple beam H01Q25/00)}
- H10P 72/74: {using temporarily an auxiliary support}
- H10W 42/121: {protecting against mechanical damage (H10W76/00, H10W74/00 take precedence)}
- H10W 44/20: at high-frequency [HF] or radio frequency [RF]
- H10W 70/05: of insulating or insulated package substrates, or of interposers, or of redistribution layers (manufacture or treatment of leadframes H10W70/04)
- H10W 70/09: extending onto an encapsulation that laterally surrounds the chip or wafer, e.g. fan-out wafer level package [FOWLP] RDLs
- H10W 70/095: {of vias therein}
- H10W 70/60: Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40)
- H10W 70/614: {the multiple chips being integrally enclosed}
- H10W 70/635: {Through-vias}
- H10W 70/695: Organic materials
- H10W 72/30: Die-attach connectors
- H10W 74/016: {using moulds}
- H10W 74/019: {using temporary auxiliary substrates (H10W74/017 takes precedence)}
- H10W 74/117: {the substrate having spherical bumps for external connection}
- H10W 90/401: {characterised by multiple insulating or insulated package substrates, interposers or RDLs}
- H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts}
- H10P 72/7412: {the auxiliary support including means facilitating the separation of a device or wafer from the auxiliary support}
- H10P 72/7416: {used during dicing or grinding}
- H10P 72/7424: {used as a support during the manufacture of self-supporting substrates}
- H10P 72/743: {used as a support during manufacture of interconnect decals or build up layers}
- H10P 72/7436: {used to support a device or a wafer when forming electrical connections thereto}
- H10W 44/209: {Vertical interconnections, e.g. vias}
- H10W 44/248: {for antennas}
- H10W 70/099: {Connecting interconnections to insulating or insulated package substrates, interposers or redistribution layers}
- H10W 70/6528: {of the portions that connect to chips, wafers or package parts}
- H10W 72/073: {of die-attach connectors}
- H10W 72/07307: {the auxiliary member being a temporary substrate, e.g. a removable substrate}
- H10W 72/241: {Dispositions, e.g. layouts}
- H10W 72/874: {On different surfaces}
- H10W 72/9413: {on encapsulations}
- H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H01Q: ANTENNAS, i.e. RADIO AERIALS (radiators or antennas for microwave heating H05B6/72)
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A package structure includes a first and a second conductive feature structures, a die, an insulator, an encapsulant, an adhesive layer, and a first through via. The die is located between the first conductive feature structure and the second conductive feature structure. The die is electrically connected to the second conductive feature structure. The insulator is disposed between the die and the first conductive feature structure. The insulator has a bottom surface in physical contact with a polymer layer of the first conductive feature structure. The encapsulant is located between the first conductive feature structure and the second conductive feature structure. The encapsulant is disposed on the insulator and laterally encapsulates the die and the insulator. The adhesive layer is disposed between the die and the insulator. The first through via extends through the encapsulant to connect to the first conductive feature structure and the second conductive feature structure.

## Claims

### Claim 1

A package structure, comprising:
a first conductive feature structure;
a second conductive feature structure over the first conductive feature structure;
a die, between the first conductive feature structure and the second conductive feature structure, wherein the die is electrically connected to the second conductive feature structure;
an insulator, disposed between the die and the first conductive feature structure, wherein the insulator has a bottom surface in physical contact with a polymer layer of the first conductive feature structure;
an adhesive layer, disposed between the die and the insulator;
an encapsulant, between the first conductive feature structure and the second conductive feature structure, wherein the encapsulant is disposed on the insulator and laterally encapsulates the die and the insulator; and
a first through via, extending through the encapsulant to connect to the first conductive feature structure and the second conductive feature structure,.
wherein the insulator comprises a coefficient of thermal expansion lager than a coefficient of thermal expansion of the die and less than a coefficient of thermal expansion of the encapsulant.

### Claim 2 (depends on 1)

The package structure of claim 1, further comprising a second through via, wherein the second through via extends through the encapsulant to connect to the first conductive feature structure and the second conductive feature structure, and a portion of the insulator is disposed laterally between the first through via and the second through via.

### Claim 3 (depends on 1)

The package structure of claim 1, wherein a bottommost surface of the first through via is lower than the bottom surface of the insulator.

### Claim 4 (depends on 3)

The package structure of claim 3, wherein the bottom surface of the insulator is between the bottommost surface of the first through via and a top surface of the first through via.

### Claim 5 (depends on 1)

The package structure of claim 1, wherein a ratio between a volume of the insulator to a volume of the encapsulant is range from 0.4 to 0.7.

### Claim 6 (depends on 1)

The package structure of claim 1, further comprising a first antenna element encapsulated in the encapsulant.

### Claim 7 (depends on 6)

The package structure of claim 6, wherein the first antenna element is spaced from the insulator by the encapsulant therebetween.

### Claim 8 (depends on 6)

The package structure of claim 6, wherein the first antenna element is offset laterally from the insulator.

### Claim 9 (depends on 1)

The package structure of claim 1, wherein
the first conductive feature structure comprises a first surface and a second surface opposite to each other, the first surface is in contact with the insulator,
the package structure further comprises a second antenna element disposed over the second surface of the first conductive feature structure.

### Claim 10 (depends on 1)

The package structure of claim 1, wherein the die is mounted within in a die region, and the insulator in the die region is thicker than the insulator in regions other than the die region.

### Claim 11 (depends on 1)

The package structure of claim 1, wherein the insulator surrounds the first through via.

### Claim 12

A package structure, comprising:
an insulator, wherein the insulator comprises a dielectric material;
a die, disposed on the insulator;
an adhesive layer, disposed between the die and the insulator; and
an encapsulant, disposed on the insulator and laterally encapsulating sidewalls of the die and the insulator,
wherein the insulator comprises a coefficient of thermal expansion lager than a coefficient of thermal expansion of the die and less than a coefficient of thermal expansion of the encapsulant.

### Claim 13 (depends on 12)

The package structure of claim 12, wherein the die is disposed within in a die region, and the insulator in the die region is thicker than the insulator in regions other than the die region.

### Claim 14 (depends on 12)

The package structure of claim 12, further comprising
a first through via laterally aside the die and the insulator; and
a second through via laterally aside the first through via,
wherein the first through via and the second through via are encapsulated by the encapsulant, and a portion of the insulator is disposed between the first through via and the second through via.

### Claim 15 (depends on 14)

The package structure of claim 14, wherein a bottommost surface of the first through via is lower than a bottom surface of the insulator.

### Claim 16 (depends on 12)

The package structure of claim 12, further comprising an antenna element encapsulated in the encapsulant, wherein the antenna element is offset laterally from the insulator.

### Claim 17

A method of fin wing a package structure, comprising:
forming a through via on a first conductive feature structure;
forming an insulator on the first conductive feature structure;
mounting a die on the insulator over the first conductive feature structure through an adhesive layer, wherein the adhesive layer is disposed between the die and the insulator; and
forming an encapsulant on the insulator and the first conductive feature structure to laterally encapsulate sidewalls of the die, wherein the insulator has a bottom surface in physical contact with a polymer layer of the first conductive feature structure,
wherein the through via extends through the encapsulant to connect to the first conductive feature structure,
wherein the insulator comprises a coefficient of thermal expansion lager than a coefficient of thermal expansion of the die and less than a coefficient of thermal expansion of the encapsulant.

### Claim 18 (depends on 17)

The method of claim 17, wherein the die is mounted within in a die region, and the insulator in the die region is thicker than the insulator in regions other than the die region.

### Claim 19 (depends on 17)

The method of claim 17, further comprising:
forming a dipole antenna laterally aside the through via and encapsulated in the encapsulant; and
forming a patch antenna, wherein the patch antenna and the die are disposed on opposite sides of the first conductive feature structure.

### Claim 20 (depends on 19)

The method of claim 19, wherein the insulator has an opening, and the through via and the dipole antenna are disposed within the opening.