# US 11,908,767 B2 · Semiconductor package structure > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,908,767 B2 - Document ID: US11908767B2 - Status: Granted - Kind: B2 - Application number: 17/545,015 - Filed: 2021-12-08 - Published: 2022-07-14 - Granted: 2024-02-20 - Earliest claimed: 2021-01-13 - Assignees: Mediatek Inc. - Applicants: Mediatek Inc. - Inventors: Che-Hung Kuo; Hsing-Chih Liu; Chia-Hao Hsu - Web page: https://patentgrep.com/patent/US11908767B2 ## CPC - H10W 40/22: characterised by their shape, e.g. having conical or cylindrical projections - H10W 40/10: Arrangements for heating - H10W 70/611: {for connecting multiple chips together} - H10W 70/635: {Through-vias} - H10W 70/68: Shapes or dispositions thereof - H10W 70/685: comprising multiple insulating layers - H10W 74/111: {the semiconductor body being completely enclosed} - H10W 90/401: {characterised by multiple insulating or insulated package substrates, interposers or RDLs} - H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts} - H10W 70/60: Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40) - H10W 74/00: Encapsulations, e.g. protective coatings - H10W 74/117: {the substrate having spherical bumps for external connection} - H10W 90/754: {between a chip and a stacked insulating package substrate, interposer or RDL} - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract A semiconductor package structure includes a first redistribution layer, a semiconductor die, a thermal spreader, and a molding material. The semiconductor die is disposed over the first redistribution layer. The thermal spreader is disposed over the semiconductor die. The molding material surrounds the semiconductor die and the thermal spreader. ## Claims ### Claim 1 A semiconductor package structure, comprising: a first redistribution layer; a semiconductor die disposed directly over the first redistribution layer; a thermal spreader disposed directly over the semiconductor die; a second redistribution layer disposed directly over the thermal spreader, wherein the thermal spreader is bonded onto the semiconductor die through a first adhesion layer and bonded onto the second redistribution layer through a second adhesion layer; and a molding material in contact with the semiconductor die the thermal spreader, the first redistribution layer, the second first redistribution layer, the first adhesion layer, and the second adhesion layer. ### Claim 2 (depends on 1) The semiconductor package structure as claimed in claim 1, wherein the thermal spreader has a larger projection area than the semiconductor die. ### Claim 3 (depends on 1) The semiconductor package structure as claimed in claim 1, wherein the second redistribution layer is disposed over the molding material and electrically coupled to the first redistribution layer through a conductive pillar. ### Claim 4 (depends on 1) The semiconductor package structure as claimed in claim 1, wherein the second adhesion layer is partially embedded in the second redistribution layer. ### Claim 5 (depends on 1) The semiconductor package structure as claimed in claim 1, wherein the thermal spreader comprises a metal, a dummy semiconductor die, or a combination thereof. ### Claim 6 (depends on 1) The semiconductor package structure as claimed in claim 1, further comprising another semiconductor die disposed between the semiconductor die and the first redistribution layer and surrounded by the molding material. ### Claim 7 (depends on 1) The semiconductor package structure as claimed in claim 1, wherein a sidewall of the thermal spreader is coplanar with a sidewall of the semiconductor die. ### Claim 8 (depends on 1) The semiconductor package structure as claimed in claim 1, wherein the second adhesion layer is in contact with a conductive layer of the second redistribution layer. ### Claim 9 A semiconductor package structure, comprising: a substrate having a wiring structure; a semiconductor die disposed directly over the substrate and electrically coupled to the wiring structure; a thermal spreader disposed directly over the semiconductor die; an interposer disposed directly over the thermal spreader; and a molding material in contact with the substrate, the semiconductor die, and the thermal spreader. ### Claim 10 (depends on 9) The semiconductor package structure as claimed in claim 9, wherein the thermal spreader has a larger projection area than the semiconductor die. ### Claim 11 (depends on 9) The semiconductor package structure as claimed in claim 9, further comprising an adhesion layer disposed between the semiconductor die and the thermal spreader. ### Claim 12 (depends on 9) The semiconductor package structure as claimed in claim 9, wherein the interposer is disposed over the molding material and spaced apart from the thermal spreader by the molding material. ### Claim 13 (depends on 9) The semiconductor package structure as claimed in claim 9, wherein a sidewall of the thermal spreader is coplanar with a sidewall of the semiconductor die. ### Claim 14 A semiconductor package structure, comprising: a first substrate having a wiring structure; a first redistribution layer disposed directly over the first substrate; a semiconductor die disposed directly over the first redistribution layer and electrically coupled to the wiring structure; and a first thermal spreader bonded onto the first substrate via a first thermal interface material and thermally coupled to the semiconductor die, wherein the first thermal interface material and the semiconductor die are disposed on opposite sides of the first thermal spreader, and the first thermal spreader is disposed between the first redistribution layer and the first substrate. ### Claim 15 (depends on 14) The semiconductor package structure as claimed in claim 14, wherein the first thermal spreader comprises a passive component. ### Claim 16 (depends on 14) The semiconductor package structure as claimed in claim 14, further comprising: a second redistribution layer disposed over the semiconductor die; a second substrate disposed over the second redistribution layer; and a second thermal spreader disposed between the second redistribution layer and the second substrate. ### Claim 17 (depends on 16) The semiconductor package structure as claimed in claim 16, wherein the second thermal spreader is bonded onto the second substrate via a second thermal interface material. ### Claim 18 (depends on 14) The semiconductor package structure as claimed in claim 14, further comprising a plurality of conductive terminals disposed adjacent to the first thermal spreader.