# US 11,908,738 B2 · Interconnect including integrally formed capacitor > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,908,738 B2 - Document ID: US11908738B2 - Status: Granted - Kind: B2 - Application number: 17/451,254 - Filed: 2021-10-18 - Published: 2023-04-20 - Granted: 2024-02-20 - Earliest claimed: 2021-10-18 - Assignees: International Business Machines Corporation - Applicants: International Business Machines Corporation - Inventors: Nicholas Anthony Lanzillo; Chih-Chao Yang - Web page: https://patentgrep.com/patent/US11908738B2 ## CPC - H10W 20/057: {by selectively depositing, e.g. by using selective CVD or plating} - H10W 20/42: Vias, e.g. via plugs - H10W 20/427: {Power or ground buses} - H10W 20/438: {Interconnections with multiple fill metals, e.g. having different metals in wide and narrow interconnections, or having different metals in vias and in trenches} - H10W 20/496: {Capacitor integral with wiring layers} - H10W 20/076: {in via holes or trenches} - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract A method of making a semiconductor component includes depositing a first metal material onto a structure having a first cavity and a second cavity such that the first metal material fills the first cavity and forms a first lining on exposed surfaces of the second cavity. The method further includes depositing a dielectric material onto the structure such that the dielectric material forms a second lining on exposed surfaces of the first lining. The method further includes depositing a second metal material onto the structure such that the second metal material fills remaining volume in the second cavity. ## Claims ### Claim 1 A method of making a semiconductor component, the method comprising: depositing a first metal material onto a structure having a first cavity and a second cavity such that the first metal material fills the first cavity and forms a first lining on exposed surfaces of the second cavity; depositing a dielectric material onto the structure such that the dielectric material forms a second lining on exposed surfaces of the first lining, such that the second lining has a first thickness on substantially horizontal exposed surfaces of the first lining and a second thickness on non-substantially horizontal exposed surfaces of the first lining, and such that the first thickness is different than the second thickness; and depositing a second metal material onto the structure such that the second metal material fills remaining volume in the second cavity. ### Claim 2 (depends on 1) The method of claim 1, wherein the first cavity has a first width and the second cavity has a second width that is greater than the first width. ### Claim 3 (depends on 1) The method of claim 1, wherein depositing the dielectric material includes depositing the dielectric material such that the dielectric material is in direct contact with the first metal material. ### Claim 4 (depends on 1) The method of claim 1, wherein depositing the second metal material includes depositing the second metal material such that the second metal material is in direct contact with the dielectric material. ### Claim 5 (depends on 1) The method of claim 1, wherein depositing the second metal material includes depositing the second metal material using physical vapor deposition. ### Claim 6 (depends on 1) The method of claim 1, wherein depositing the dielectric material includes depositing the dielectric material using physical vapor deposition. ### Claim 7 (depends on 1) The method of claim 1, wherein depositing the dielectric material includes depositing the dielectric material such that the first thickness is thicker second thickness. ### Claim 8 (depends on 1) The method of claim 1, further comprising selectively removing a portion of the second lining from a substantially horizontal exposed surface of the first lining prior to depositing the second metal material. ### Claim 9 (depends on 1) The method of claim 1, further comprising removing the second lining from substantially horizontal exposed surfaces of the first lining prior to depositing the second metal material. ### Claim 10 (depends on 1) The method of claim 1, wherein: depositing the dielectric material onto the structure includes forming a layer of the dielectric material above the filled first cavity, depositing the second metal material onto the structure includes forming a second layer of the second metal material above the filled first cavity, and the method further includes removing the layer and the second layer after depositing the second metal material. ### Claim 11 A semiconductor component, comprising: a dielectric material including a first cavity and a second cavity; a first metal material in direct contact with the dielectric material such that the first metal material fills the first cavity and such that the first metal material forms a first lining in the second cavity; a further dielectric material in direct contact with the first metal material such that the further dielectric material forms a second lining in the second cavity, the second lining having a first thickness on substantially horizontal exposed surfaces of the first lining and a second thickness on non-substantially horizontal exposed surfaces of the first lining, the first thickness being different than the second thickness; and a second metal material in direct contact with the further dielectric material such that the second metal material fills the second cavity. ### Claim 12 (depends on 11) The semiconductor component of claim 11, wherein: the first cavity has a first width, and the second cavity has a second width that is larger than the first width. ### Claim 13 (depends on 11) The semiconductor component of claim 11, wherein the first metal material in the first cavity forms a signal line. ### Claim 14 (depends on 11) The semiconductor component of claim 11, wherein the second metal material in the second cavity forms a power line. ### Claim 15 (depends on 11) The semiconductor component of claim 11, wherein the second metal material is copper. ### Claim 16 (depends on 11) The semiconductor component of claim 11, wherein the first metal material is not copper. ### Claim 17 (depends on 11) The semiconductor component of claim 11, wherein the first metal material includes a first layer formed of a first material and a second layer formed of a second material. ### Claim 18 A semiconductor component, comprising: a dielectric material having a first cavity and a second cavity, wherein: the first cavity is filled with a first metal material, the second cavity is lined with the first metal material, further lined with a further dielectric material, and filled with a second metal material such that the first metal material, further dielectric material, and second metal material form a capacitor in the second cavity, and the further dielectric material has a first thickness on substantially horizontal exposed surfaces of the first metal material and a second thickness on non-substantially horizontal exposed surfaces of the first metal material, the first thickness different than the second thickness. ### Claim 19 (depends on 18) The semiconductor component of claim 18, wherein the first metal material does not include copper. ### Claim 20 (depends on 18) The semiconductor component of claim 18, wherein the second metal material in the second cavity forms a power line.