# US 11,908,701 B2 · Patterning method and manufacturing method of semiconductor device

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- Number: US 11,908,701 B2
- Document ID: US11908701B2
- Status: Granted
- Kind: B2
- Application number: 17/238,170
- Filed: 2021-04-22
- Published: 2022-10-27
- Granted: 2024-02-20
- Earliest claimed: 2021-04-22
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Company, Ltd.
- Inventors: Christine Y Ouyang; Li-Te Lin
- Web page: https://patentgrep.com/patent/US11908701B2

## CPC

- H10P 50/283: {by chemical means}
- H10P 14/6339: {deposition by cyclic CVD, e.g. ALD, ALE or pulsed CVD}
- H10P 14/683: {carbon-based polymeric organic materials, e.g. polyimides, poly cyclobutene or PVC}
- H10P 14/69391: {the material containing aluminium, e.g. Al2O3}
- H10P 14/69394: {the material containing titanium, e.g. TiO2}
- H10P 50/73: {using masks for insulating materials}
- H10W 20/0698: {Local interconnections}
- H10W 20/074: {of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers}
- H10W 20/083: {the openings being via holes penetrating underlying conductors}
- H10P 14/61: using masks
- H10P 95/00: Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A patterning method includes at least the following steps. A first material layer is provided. A second material layer is provided over the first material layer. The second material layer partially exposes the first material layer. A passivation layer is formed over the first material layer and the second material layer. A growth rate of the passivation layer on the second material layer is greater than a growth rate of the passivation layer on the first material layer. A first etching process is performed to remove a portion of the passivation layer and a portion of the first material layer.

## Claims

### Claim 1

A patterning method, comprising:
providing a first material layer;
providing a second material layer over the first material layer, wherein the second material layer has an opening partially exposing the first material layer;
selectively forming a passivation layer on the second material layer to cover a top surface of the second material layer and sidewalls of the opening, wherein a portion of the exposed first material layer is uncovered by the passivation layer;
performing a first etching process to remove the portion of the exposed first material layer that is uncovered by the passivation layer; and
performing a second etching process to remove the passivation layer.

### Claim 2 (depends on 1)

The method of claim 1, further comprising:
depositing a blocking layer over the exposed first material layer prior to the formation of the passivation layer on the second material layer.

### Claim 3 (depends on 2)

The method of claim 2, wherein the passivation layer partially covers the blocking layer, and the first etching process removes the blocking layer exposed by the passivation layer.

### Claim 4 (depends on 3)

The method of claim 3,
wherein the second etching process further removes the remaining blocking layer that is not removed during the first etching process.

### Claim 5 (depends on 2)

The method of claim 2, wherein the blocking layer comprises self-assembled monolayers (SAM) or polymer brushes.

### Claim 6 (depends on 1)

The method of claim 1, wherein the passivation layer comprises an organometallic layer, and the organometallic layer comprises aluminum alkoxide, titanium alkoxide, or a combination thereof.

### Claim 7 (depends on 1)

The method of claim 1, wherein the first material layer contains oxide and the second material layer contains nitride.

### Claim 8

A patterning method, comprising:
providing a substrate;
providing a first material layer on the substrate;
providing a second material layer over the first material layer, wherein the second material layer has a first opening partially exposing the first material layer;
depositing a blocking layer in the first opening;
forming a passivation layer in the first opening, wherein the passivation layer covers a top surface of the second material layer, a top surface of the blocking layer, and sidewalls of the first opening;
performing a first etching process to remove a portion of the blocking layer and a portion of the first material layer to form a second opening exposing the substrate; and
performing a second etching process to remove the passivation layer.

### Claim 9 (depends on 8)

The method of claim 8, wherein the passivation layer partially covers the top surface of the blocking layer.

### Claim 10 (depends on 8)

The method of claim 8, wherein the blocking layer is in physical contact with a bottom surface and sidewalls of the first opening.

### Claim 11 (depends on 8)

The method of claim 8,
wherein the second etching process further removes the remaining blocking layer.

### Claim 12 (depends on 8)

The method of claim 8, wherein the blocking layer comprises self-assembled monolayers (SAM) or polymer brushes.

### Claim 13 (depends on 8)

The method of claim 8, wherein the passivation layer comprises an organometallic layer, and the organometallic layer comprises aluminum alkoxide, titanium alkoxide, or a combination thereof.

### Claim 14 (depends on 8)

The method of claim 8, wherein the first material layer contains oxide and the second material layer contains nitride.

### Claim 15 (depends on 8)

The method of claim 8, wherein after the first etching process, a sidewall of the passivation layer, a sidewall of the remaining blocking layer, and a sidewall of the remaining first material layer are aligned.

### Claim 16 (depends on 1)

The method of claim 1, further comprising:
performing a surface treatment process on the second material layer prior to the formation of passivation layer on the second material layer.

### Claim 17 (depends on 16)

The method of claim 16, wherein the surface treatment process comprises a plasma treatment process or a silylation treatment process.

### Claim 18 (depends on 1)

The method of claim 1, wherein the passivation layer comprises a polymeric material layer, and the polymeric material layer comprises polyurea, polythiourea, polyurethane, or a combination thereof.

### Claim 19

A manufacturing method of a semiconductor device, comprising:
providing a substrate;
forming a metal-oxide-semiconductor (MOS) transistor over the substrate;
forming an etch stop layer over the MOS transistor;
depositing a dielectric layer over the etch stop layer;
forming a first opening in the dielectric layer to expose the etch stop layer;
selectively forming a passivation layer on the dielectric layer to cover a top surface of the dielectric layer and sidewalls of the first opening, wherein a portion of the exposed etch stop layer is uncovered by the passivation layer;
performing a first etching process to remove the portion of the exposed etch stop layer that is uncovered by the passivation layer to form a second opening in the etch stop layer;
performing a second etching process to remove the passivation layer; and
filling a conductive material into the first opening and the second opening to form a conductive contact.

### Claim 20 (depends on 19)

The method of claim 19, wherein the etch stop layer comprises silicon nitride, and the dielectric layer comprises silicon oxide.