# US 11,908,417 B2 · Gate driving circuit and display device having the same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,908,417 B2 - Document ID: US11908417B2 - Status: Granted - Kind: B2 - Application number: 17/728,584 - Filed: 2022-04-25 - Published: 2022-08-11 - Granted: 2024-02-20 - Earliest claimed: 2016-07-14 - Assignees: Samsung Display Co., Ltd. - Applicants: Samsung Display Co., Ltd. - Inventors: Kang Nam Kim; You Mee Hyun; Beom Jun Kim; Jong Hwan Lee; Sung Hoon Lim; Duc Han Cho - Web page: https://patentgrep.com/patent/US11908417B2 ## CPC - G09G 3/3266: Details of drivers for scan electrodes - G09G 3/20: for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix {no fixed position being assigned to or needed to be assigned to the individual characters or partial characters} - G09G 3/3677: {suitable for active matrices only} - G11C 19/28: using semiconductor elements (G11C19/14, G11C19/36 take precedence) - G09G 2300/0426: Layout of electrodes and connections - G09G 2310/0267: Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays - G09G 2310/0286: Details of a shift registers arranged for use in a driving circuit - G09G 2310/08: Details of timing specific for flat panels, other than clock recovery - G09G 2320/0223: Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) - G11C: STATIC STORES (semiconductor memory devices H10B) ## Abstract A gate driving circuit including a controller for providing a first carry signal to a control node, a first pull-up portion for outputting a first clock signal as a first gate signal in accordance with a signal provided to the control node, and a second pull-up portion for outputting a second clock signal with a phase that is different from the first clock signal as a second gate signal in accordance with the signal provided to the control node. ## Claims ### Claim 1 A display device comprising: a display panel comprising a plurality of pixels connected to a first gate line, a second gate line, and a third gate line that are adjacent to one another; a first gate driving circuit on a first side of the plurality of pixels and comprising a first stage for outputting first and second gate signals having phases that are different from each other; and a second gate driving circuit on a second side of the plurality of pixels that is opposite the first side of the plurality of pixels, and comprising a second stage for outputting third and fourth gate signals having phases that are different from each other, wherein the first stage is configured to provide the first gate signal to a first side of the second gate line, wherein the second stage is configured to provide the fourth gate signal to a second side of the second gate line, wherein the first stage is configured to provide the second gate signal to a first side of the third gate line, wherein the second stage is configured to provide the third gate signal to a second side of the first gate line, and wherein the first stage comprises: a first pull-up portion for outputting a first clock signal as the first gate signal in accordance with a signal provided to a control node; and a second pull-up portion for outputting a second clock signal having a phase that is different from a phase of the first clock signal as the second gate signal in accordance with the signal provided to the control node. ### Claim 2 (depends on 1) The display device of claim 1, wherein the first stage further comprises: a controller for providing a first carry signal to the control node. ### Claim 3 (depends on 2) The display device of claim 2, wherein the first pull-up portion comprises a first pull-up transistor comprising: a gate electrode connected to the control node; an input terminal for receiving the first clock signal; and an output terminal for outputting the first gate signal, wherein the second pull-up portion comprises a second pull-up transistor comprising: a gate electrode connected to the control node; an input terminal for receiving the second clock signal; and an output terminal for outputting the second gate signal, and wherein the controller comprises: a gate electrode for receiving the first carry signal; a first control transistor connected to the control node; and a control capacitor comprising a first electrode connected to the gate electrode of the first pull-up transistor, and a second electrode connected to the output terminal of the first pull-up transistor. ### Claim 4 (depends on 1) The display device of claim 1, wherein the second stage comprises: a controller for providing a first carry signal to a control node; a first pull-up portion for outputting a first clock signal as the third gate signal in accordance with the first carry signal provided to the control node; and a second pull-up portion for outputting a second clock signal having a phase that is different from the phase of the first clock signal as the fourth gate signal in accordance with the first carry signal provided to the control node. ### Claim 5 (depends on 4) The display device of claim 4, wherein the first pull-up portion comprises a first pull-up transistor comprising: a gate electrode connected to the control node; an input terminal for receiving the first clock signal; and an output terminal for outputting the third gate signal, wherein the second pull-up portion comprises a second pull-up transistor comprising: a gate electrode connected to the control node; an input terminal for receiving the second clock signal; and an output terminal for outputting the fourth gate signal, and wherein the controller comprises: a gate electrode for receiving the first carry signal; a control transistor connected to the control node; and a control capacitor comprising a first electrode connected to the gate electrode of the first pull-up transistor, and a second electrode connected to the output terminal of the first pull-up transistor. ### Claim 6 (depends on 1) The display device of claim 1, wherein the first gate driving circuit further comprises a third stage that is adjacent to the first stage, and has a first output terminal and a second output terminal for outputting two respective gate signals having phases that are different from each other, wherein the second gate driving circuit further comprises a fourth stage that is adjacent to the second stage, and has a first output terminal and a second output terminal for outputting two respective gate signals having phases that are different from each other, wherein the second output terminal of the third stage is connected to a first side of the first gate line, and wherein the first output terminal of the fourth stage is connected to a second side of the third gate line.