# US 11,908,392 B2 · Display device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,908,392 B2 - Document ID: US11908392B2 - Status: Granted - Kind: B2 - Application number: 18/072,507 - Filed: 2022-11-30 - Published: 2023-06-15 - Granted: 2024-02-20 - Earliest claimed: 2021-12-14 - Assignees: Samsung Display Co., Ltd. - Applicants: Samsung Display Co., LTD. - Inventors: Jun Ki Jeong; Hyun Joon Kim; Jung Hwan Hwang - Web page: https://patentgrep.com/patent/US11908392B2 ## CPC - G09G 3/32: semiconductive, e.g. using light-emitting diodes [LED] - G09G 3/2081: {with combination of amplitude modulation and time modulation (space and time error diffusion G09G3/2066)} - G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element - G09G 3/3258: with pixel circuitry controlling the voltage across the light-emitting element - G09G 2300/0819: used for counteracting undesired variations, e.g. feedback or autozeroing - G09G 2300/0852: being a dynamic memory with more than one capacitor - G09G 2300/0861: with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes - G09G 2310/0259: with use of an analog or digital ramp generator in the column driver or in the pixel circuit - G09G 2310/066: Waveforms comprising a gently increasing or decreasing portion, e.g. ramp - G09G 2320/0233: Improving the luminance or brightness uniformity across the screen - G09G 2320/0242: Compensation of deficiencies in the appearance of colours - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) ## Abstract A display device including: a first transistor configured to control a control current based on a voltage of a first node; a second transistor configured to electrically connect a second node that is a first electrode of the first transistor to a first data line in response to a scan write signal; a third transistor configured to control a driving current based on a voltage of a third node; a fourth transistor configured to electrically connect a fourth node that is a first electrode of the third transistor to a second data line in response to the scan write signal; a fifth transistor configured to control the driving current based on a voltage of a fifth node having received the control current; and a light emitting element configured to receive the driving current, wherein the fifth transistor is of a different type from that of the first to fourth transistors. ## Claims ### Claim 1 A display device comprising: a first transistor configured to control a control current based on a voltage of a first node; a second transistor configured to electrically connect a second node that is a first electrode of the first transistor to a first data line in response to a scan write signal; a third transistor configured to control a driving current based on a voltage of a third node; a fourth transistor configured to electrically connect a fourth node that is a first electrode of the third transistor to a second data line in response to the scan write signal; a fifth transistor configured to control the driving current based on a voltage of a fifth node having received the control current; and a light emitting element configured to receive the driving current and to emit light, wherein the fifth transistor is a MOSFET of a different type from that of the first to fourth transistors. ### Claim 2 (depends on 1) The display device of claim 1, wherein the fifth transistor comprises an oxide-based semiconductor layer, and the first to fourth transistors comprise a low-temperature polysilicon-based semiconductor layer. ### Claim 3 (depends on 1) The display device of claim 1, wherein an S-factor of the fifth transistor is smaller than an S-factor of the first to fourth transistors. ### Claim 4 (depends on 1) The display device of claim 1, further comprising: a sweep line configured to supply a sweep signal having a pulse that linearly decreases from a gate-off voltage to a gate-on voltage; and a first capacitor comprising a first capacitor electrode connected to the first node, and a second capacitor electrode connected to the sweep line. ### Claim 5 (depends on 4) The display device of claim 4, further comprising: a sixth transistor configured to electrically connect the first node to an initialization voltage line in response to a scan initialization signal; and a seventh transistor configured to electrically connect a sixth node that is a second electrode of the first transistor to the first node in response to the scan write signal. ### Claim 6 (depends on 5) The display device of claim 5, further comprising: an eighth transistor configured to electrically connect a first power line to the second node in response to a PWM emission signal received from a PWM emission line; and a ninth transistor configured to electrically connect the sixth node to the fifth node in response to the PWM emission signal. ### Claim 7 (depends on 6) The display device of claim 6, further comprising a tenth transistor configured to electrically connect a gate-off voltage line to a second capacitor electrode of the first capacitor in response to a scan control signal. ### Claim 8 (depends on 1) The display device of claim 1, further comprising: a second capacitor comprising a first capacitor electrode connected to the third node and a second capacitor electrode connected to a seventh node; an eleventh transistor configured to electrically connect a first power line to the seventh node in response to a scan control signal; and a twelfth transistor configured to electrically connect a second power line to the seventh node in response to a PWM emission signal. ### Claim 9 (depends on 8) The display device of claim 8, further comprising: a thirteenth transistor configured to electrically connect the third node to an initialization voltage line in response to a scan initialization signal; and a fourteenth transistor configured to electrically connect an eighth node that is a second electrode of the third transistor to the third node in response to the scan write signal. ### Claim 10 (depends on 9) The display device of claim 9, further comprising: a fifteenth transistor configured to electrically connect a second power line to the fourth node in response to the PWM emission signal; and a sixteenth transistor configured to electrically connect a second electrode of the fifth transistor to a first electrode of the light emitting element in response to a PAM emission signal. ### Claim 11 (depends on 1) The display device of claim 1, further comprising: a third capacitor comprising a first capacitor electrode connected to the fifth node and a second capacitor electrode connected to an initialization voltage line; and a seventeenth transistor configured to electrically connect the fifth node to the initialization voltage line in response to a scan initialization signal. ### Claim 12 (depends on 11) The display device of claim 11, further comprising an eighteenth transistor configured to electrically connect a first electrode of the light emitting element to the initialization voltage line in response to a scan control signal. ### Claim 13 A display device comprising: a first transistor configured to control a control current based on a voltage of a first node; a second transistor configured to electrically connect a second node that is a first electrode of the first transistor to a first data line in response to a scan write signal; a third transistor configured to control a driving current based on a voltage of a third node; a fourth transistor configured to electrically connect a fourth node that is a first electrode of the third transistor to a second data line in response to the scan write signal; a fifth transistor configured to control the driving current based on a voltage of a fifth node having received the control current; and a light emitting element configured to receive the driving current and to emit light, wherein the fifth transistor is configured to be turned on in response to a gate-source voltage being greater than a threshold voltage, and the first to fourth transistors are configured to be turned on in response to a source-gate voltage being greater than the threshold voltage. ### Claim 14 (depends on 13) The display device of claim 13, wherein the fifth transistor comprises an oxide-based semiconductor layer, and the first to fourth transistors comprise a low-temperature polysilicon-based semiconductor layer. ### Claim 15 (depends on 13) The display device of claim 13, further comprising: a sweep line configured to supply a sweep signal having a pulse that linearly decreases from a gate-off voltage to a gate-on voltage; and a first capacitor comprising a first capacitor electrode connected to a gate electrode of the first transistor, and a second capacitor electrode connected to the sweep line. ### Claim 16 (depends on 15) The display device of claim 15, further comprising: a sixth transistor configured to electrically connect the first node to an initialization voltage line in response to a scan initialization signal; a seventh transistor configured to electrically connect a sixth node that is a second electrode of the first transistor to the first node in response to the scan write signal; and an eighth transistor configured to electrically connect a gate-off voltage line to the second capacitor electrode of the first capacitor in response to a scan control signal. ### Claim 17 (depends on 16) The display device of claim 16, wherein the scan initialization signal and the scan write signal are generated at intervals of one frame period, and the scan control signal is generated as many as a number of emission periods during the one frame period. ### Claim 18 A display device comprising: a first transistor configured to control a control current based on a voltage of a first node; a first capacitor comprising a first capacitor electrode connected to the first node, and a second capacitor electrode connected to a sweep line; a second transistor configured to control a driving current based on a voltage of a second node; a second capacitor comprising a first capacitor electrode connected to the second node and a second capacitor electrode connected to a third node; a third transistor configured to control the driving current based on a voltage of a fourth node having received the control current; a third capacitor comprising a first capacitor electrode connected to the fourth node and a second capacitor electrode connected to an initialization voltage line; and a light emitting element configured to receive the driving current and to emit light, wherein the third transistor is a MOSFET of a different type from that of the first and second transistors. ### Claim 19 (depends on 18) The display device of claim 18, further comprising: a fourth transistor configured to electrically connect a fifth node that is a first electrode of the first transistor to a first data line; and a fifth transistor configured to electrically connect a sixth node that is a first electrode of the second transistor to a second data line. ### Claim 20 (depends on 19) The display device of claim 19, further comprising: a sixth transistor configured to electrically connect the first node to the initialization voltage line in response to a scan initialization signal; and a seventh transistor configured to electrically connect a seventh node that is a second electrode of the first transistor to the first node in response to the scan write signal.