# US 11,907,721 B2 · Inserting predefined pad values into a stream of vectors

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- Number: US 11,907,721 B2
- Document ID: US11907721B2
- Status: Granted
- Kind: B2
- Application number: 17/379,528
- Filed: 2021-07-19
- Published: 2021-11-11
- Granted: 2024-02-20
- Earliest claimed: 2013-07-15
- Assignees: Texas Instruments Incorporated
- Applicants: Texas Instruments Incorporated
- Inventors: Asheesh Bhardwaj; Timothy David Anderson; Son Hung Tran
- Web page: https://patentgrep.com/patent/US11907721B2

## CPC

- G06F 9/3016: {Decoding the operand specifier, e.g. specifier format}
- G06F 9/30014: {with variable precision}
- G06F 9/30036: {Instructions to perform operations on packed data, e.g. vector, tile or matrix operations}
- G06F 9/30038: {using a mask}
- G06F 9/30043: {LOAD or STORE instructions; Clear instruction}
- G06F 9/30047: {Prefetch instructions; cache control instructions}
- G06F 9/30098: {Register arrangements}
- G06F 9/30112: {comprising data of variable length}
- G06F 9/30145: {Instruction analysis, e.g. decoding, instruction word fields}
- G06F 9/32: Address formation of the next instruction, e.g. by incrementing the instruction counter (G06F9/38 takes precedence)
- G06F 9/345: of multiple operands or results {(addressing multiple banks G06F12/06)}
- G06F 9/3455: {using stride}
- G06F 9/3802: {Instruction prefetching}
- G06F 9/383: {Operand prefetching (cache prefetching G06F12/0862)}
- G06F 9/3867: {using instruction pipelines}
- G06F 11/00: Error detection; Error correction; Monitoring (error detection, correction or monitoring in information storage based on relative movement between record carrier and transducer G11B20/18; monitoring, i.e. supervising the progress of recording or reproducing G11B27/36; in static stores G11C29/00)
- G06F 11/1048: {using arrangements adapted for a specific error detection or correction feature}
- G06F 12/0862: with prefetch
- G06F 12/0875: with dedicated cache, e.g. instruction or stack
- G06F 12/0897: with two or more cache hierarchy levels (with multilevel cache hierarchies G06F12/0811)
- G06F 12/1027: using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
- G06F 7/74: Selecting or encoding within a word the position of one or more bits having a specified value, e.g. most or least significant one or zero detection, priority encoders {(with shifting G06F5/01)}
- G06F 9/3822: {Parallel decoding, e.g. parallel decode units}
- G06F 11/10: Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F 17/16: Matrix or vector computation {, e.g. matrix-matrix or matrix-vector multiplication, matrix factorization (matrix transposition G06F7/78)}
- G06F 2212/452: Instruction code
- G06F 2212/60: Details of cache memory
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

Software instructions are executed on a processor within a computer system to configure a steaming engine with stream parameters to define a multidimensional array. The stream parameters define a size for each dimension of the multidimensional array and a pad value indicator. Data is fetched from a memory coupled to the streaming engine responsive to the stream parameters. A stream of vectors is formed for the multidimensional array responsive to the stream parameters from the data fetched from memory. A padded stream vector is formed that includes a specified pad value without accessing the pad value from system memory.

## Claims

### Claim 1

A method of operating a streaming engine in a computer system, the method comprising:
receiving, by the streaming engine, stream parameters into control logic of the streaming engine to define a multidimensional array, wherein the stream parameters include a width indicator for a dimension of the multidimensional array, wherein the width indicator includes a width count;
generating, by an address generator, an address stream based on the stream parameters;
retrieving, by the streaming engine, a line of matrix data from a memory based on the address stream; and
forming, by the streaming engine, a stream vector in response to a status of the width count.

### Claim 2 (depends on 1)

The method of claim 1, wherein:
the status of the width count is depleted.

### Claim 3 (depends on 2)

The method of claim 2, wherein:
the status of the width count is not saturated.

### Claim 4 (depends on 3)

The method of claim 3, wherein:
the stream vector is formed by masking a portion of the stream vector that exceeds the width count.

### Claim 5 (depends on 4)

The method of claim 4, wherein:
a value of zero is inserted in the portion of the stream vector that is masked.

### Claim 6 (depends on 4)

The method of claim 4, wherein:
a predefined value is inserted in the portion of the stream vector that is masked.

### Claim 7 (depends on 6)

The method of claim 6, wherein:
the predefined value is one of a minimum value and a maximum value.

### Claim 8 (depends on 2)

The method of claim 2, wherein:
the status of the width count is saturated.

### Claim 9 (depends on 8)

The method of claim 8, wherein:
the stream vector is a null vector formed without accessing the memory.

### Claim 10 (depends on 9)

The method of claim 9, wherein:
the null vector is all zeros.

### Claim 11 (depends on 9)

The method of claim 9, wherein:
the null vector is a predetermined value.

### Claim 12 (depends on 11)

The method of claim 11, wherein:
the predetermined value is selected from one of a minimum value and a maximum value.

### Claim 13 (depends on 11)

The method of claim 11, wherein:
the predetermined value is designated by a flag value in the stream parameters.

### Claim 14 (depends on 1)

The method of claim 1, further comprising:
decrementing the width count.

### Claim 15 (depends on 14)

The method of claim 14, further comprising:
in response to matrix data remaining to be retrieved, retrieving, by the streaming engine, a next line of the matrix data.

### Claim 16

A system, comprising:
a system memory;
a streaming engine coupled to access the system memory, the streaming engine configured to:
receive stream parameters defining a multidimensional array, wherein the stream parameters include a width indicator for each dimension of the multidimensional array, wherein the width indicator includes a width count;
generate an address stream based on the stream parameters;
retrieve a line of matrix data from the system memory based on the address stream; and
form a stream of vectors in response to a status of the width count of the width indicator; and
a processing unit coupled to outputs of the streaming engine to receive the stream of vectors.

### Claim 17 (depends on 16)

The system of claim 16, wherein:
the status of the width count is depleted and not saturated.

### Claim 18 (depends on 17)

The system of claim 17, wherein:
the stream of vectors is formed by masking a portion of the stream of vectors that exceeds the width count.

### Claim 19 (depends on 16)

The system of claim 16, wherein:
the status of the width count is depleted and saturated.

### Claim 20 (depends on 19)

The system of claim 19, wherein:
the stream of vectors includes a null vector formed without accessing the system memory.