# US 11,907,626 B2 · Method, device, and electronic apparatus of inspecting display panel > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,907,626 B2 - Document ID: US11907626B2 - Status: Granted - Kind: B2 - Application number: 16/969,566 - Filed: 2020-05-13 - Published: 2023-04-27 - Granted: 2024-02-20 - Earliest claimed: 2020-04-27 - Assignees: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd. - Applicants: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd. - Inventors: Bo Lv; Zui Wang - Web page: https://patentgrep.com/patent/US11907626B2 ## CPC - G02F 1/1309: {Repairing; Testing} - G06F 30/31: Design entry, e.g. editors specifically adapted for circuit design - G09G 3/006: {Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays (testing individual LED's G01R31/2635; testing lamps G01R31/44; testing of optical features of LCD displays G02F1/1309)} - G02F: OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) ## Abstract A method, a device, and an electronic apparatus are provided. When a user performs the design operation in a display panel design program, the method includes steps of collecting display panel design parameters corresponding to a design operation of the user in the display panel design program obtaining a design strategy preset in the display panel; checking if the display panel design parameters are normal based upon the design strategy of the display panel; and alerting in the display panel design program when the display panel design parameters are abnormal. ## Claims ### Claim 1 A method of inspecting a display panel, comprising: collecting display panel design parameters corresponding to a design operation of a user in a display panel design program when the user performs the design operation in the display panel design program; obtaining a design strategy preset for the display panel, wherein the design strategy comprises a design strategy of each of one or more structures in the display panel, and a correspondence between the structures in the display panel; checking if the display panel design parameters are normal based upon the design strategy of the display panel; and alerting in the display panel design program when the display panel design parameters are abnormal, wherein the display panel is a thin film transistor (TFT) liquid crystal display panel, and the design strategy comprises a TFT substrate design strategy, an upper polarizer design strategy, a color filter (CF) substrate design strategy, and a lower polarizer design strategy; the TFT substrate design strategy comprises specification design parameters of each of layers of a TFT substrate, and a correspondence between the layers of the TFT substrate; and the CF substrate design strategy comprises specification design parameters of each of layers of a CF substrate, and a correspondence between the layers of the CF substrate. ### Claim 2 (depends on 1) The method according to claim 1, wherein the collecting of the display panel design parameters comprises: when the user performs the design operation in the display panel design program, collecting design parameters of an operation target corresponding to the design operation; and collecting a correspondence between the operation target and existing design objects; wherein the display panel design parameters corresponding to the design operation of the user comprises the design parameters of the operation target, and the correspondence between the operation target and the existing design objects. ### Claim 3 (depends on 1) The method according to claim 1, wherein the TFT substrate design strategy comprises a test terminal design strategy, and the test terminal design strategy comprises a test terminal size specification, and that a distance between a test terminal and a driving chip is greater than a preset threshold, a distance between the test terminal and a long side of the TFT substrate is greater than X, a distance between the test terminal and a short side of the TFT substrate is greater than Y, and a spacing between test terminals is greater than Z, where X, Y, and Z are positive. ### Claim 4 (depends on 3) The method according to claim 3, wherein the TFT substrate design strategy further comprises a strategy of material and thickness, a strategy of line width definition and limitation, a strategy of alignment error limitation, and a strategy of TFT process parameters. ### Claim 5 (depends on 4) The method according to claim 4, wherein the strategy of material and thickness comprises information of material and thickness of at least one of a gate electrode, a gate insulating layer, a semiconductor layer, a doped semiconductor layer, a source-drain metal, or a transparent electrode. ### Claim 6 (depends on 4) The method according to claim 4, wherein the strategy of line width definition and limitation comprises information of line width definition and limitation of at least one of a gate metal line, a semiconductor layer line, a source-drain metal line, a contact hole, or an ITO transparent electrode. ### Claim 7 (depends on 4) The method according to claim 4, wherein the strategy of alignment error limitation comprises information of at least one of alignment error limitation between a semiconductor layer and a gate metal, alignment error limitation between a source-drain metal and the gate metal, alignment error limitation between the source-drain metal and the semiconductor layer, alignment error limitation between a contact hole and the gate metal, alignment error limitation between the contact hole and the source-drain metal, alignment error limitation between a transparent electrode and the source-drain metal, alignment error limitation between the transparent electrode and the gate metal, or alignment error limitation between the transparent electrode and the contact hole. ### Claim 8 (depends on 4) The method according to claim 4, wherein the strategy of TFT process parameters comprises at least one of an electron mobility, a cut-off voltage, a leakage current, or a parasitic capacitance. ### Claim 9 (depends on 1) The method according to claim 1, further comprising: obtaining a new design strategy of the display panel, wherein the new design strategy comprises a design strategy of at least one of the structures in the display panel, or a correspondence between at least two of the structures in the display panel; and updating the design strategy of the display panel based on the new design strategy. ### Claim 10 A device for inspecting a display panel, comprising: a collecting module for collecting display panel design parameters corresponding to a design operation of a user in a display panel design program when the user performs the design operation in the display panel design program; an obtaining module for obtaining a design strategy preset for the display panel, wherein the design strategy comprises a design strategy of each of one or more structures in the display panel, and a correspondence between the structures in the display panel; a checking module for checking if the display panel design parameters are normal based upon the design strategy of the display panel; and an alerting module for alerting in the display panel design program when the display panel design parameters are abnormal, wherein the display panel is a thin film transistor (TFT) liquid crystal display panel, and the design strategy comprises a TFT substrate design strategy, an upper polarizer design strategy, a color filter (CF) substrate design strategy, and a lower polarizer design strategy; the TFT substrate design strategy comprises specification design parameters of each of layers of a TFT substrate, and a correspondence between the layers of the TFT substrate; and the CF substrate design strategy comprises specification design parameters of each of layers of a CF substrate, and a correspondence between the layers of the CF substrate. ### Claim 11 (depends on 10) The device according to claim 10, wherein the collecting module is specifically used for: collecting design parameters of an operation target corresponding to the design operation when the user performs the design operation in the display panel design program; and collecting a correspondence between the operation target and existing design objects; wherein the display panel design parameters corresponding to the design operation performed by the user comprises the design parameters of the operation target, and a correspondence between the operation target and the existing design objects. ### Claim 12 (depends on 10) The device according to claim 10, wherein the TFT substrate design strategy comprises a test terminal design strategy, wherein the test terminal design strategy comprises a test terminal size specification, and that a distance between a test terminal and a driving chip is greater than a preset threshold, a distance between the test terminal and a long side of the TFT substrate is greater than X, a distance between the test terminal and a short side of the TFT substrate is greater than Y, and a spacing between test terminals is greater than Z, where X, Y, and Z are positive. ### Claim 13 (depends on 10) The device according to claim 10, wherein the TFT substrate design strategy further comprises a strategy of material and thickness, a strategy of line width definition and limitation, a strategy of alignment error limitation, and a strategy of TFT process parameters. ### Claim 14 (depends on 13) The device according to claim 13, wherein the strategy of material and thickness comprises information of material and thickness of at least one of a gate electrode, a gate insulating layer, a semiconductor layer, a doped semiconductor layer, a source-drain metal, or a transparent electrode. ### Claim 15 (depends on 13) The device according to claim 13, wherein the strategy of line width definition and limitation comprises information of line width definition and limitation of at least one of a gate metal line, a semiconductor layer line, a source-drain metal line, a contact hole, or an ITO transparent electrode. ### Claim 16 (depends on 13) The device according to claim 13, wherein the strategy of alignment error limitation comprises information of at least one of alignment error limitation between a semiconductor layer and a gate metal, alignment error limitation between a source-drain metal and the gate metal, alignment error limitation between the source-drain metal and the semiconductor layer, alignment error limitation between a contact hole and the gate metal, alignment error limitation between the contact hole and the source-drain metal, alignment error limitation between a transparent electrode and the source-drain metal, alignment error limitation between the transparent electrode and the gate metal, or alignment error limitation between the transparent electrode and the contact hole. ### Claim 17 (depends on 10) The device according to claim 10, further comprising an update module for: obtaining a new design strategy of the display panel, wherein the new design strategy comprises a design strategy of at least one of the structures in the display panel, or a correspondence between at least two of the structures in the display panel; and updating the design strategy of the display panel based on the new design strategy. ### Claim 18 An electronic apparatus, comprising: one or more processors; a memory; and one or more applications, wherein the one or more applications are stored in the memory and are executable by the processors to implement a method of inspecting a display panel comprising: collecting display panel design parameters corresponding to a design operation of a user in a display panel design program when the user performs the design operation in the display panel design program; obtaining a design strategy preset for the display panel, wherein the design strategy comprises a design strategy of each of one or more structures in the display panel, and a correspondence between the structures in the display panel; checking if the display panel design parameters are normal based upon the design strategy of the display panel; and alerting in the display panel design program when the display panel design parameters are abnormal, wherein the display panel is a thin film transistor (TFT) liquid crystal display panel, and the design strategy comprises a TFT substrate design strategy, an upper polarizer design strategy, a color filter (CF) substrate design strategy, and a lower polarizer design strategy; the TFT substrate design strategy comprises specification design parameters of each of layers of a TFT substrate, and a correspondence between the layers of the TFT substrate, and the CF substrate design strategy comprises specification design parameters of each of layers of a CF substrate, and a correspondence between the layers of the CF substrate.