# US 11,907,556 B2 · Data relocation operation techniques

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- Number: US 11,907,556 B2
- Document ID: US11907556B2
- Status: Granted
- Kind: B2
- Application number: 17/580,296
- Filed: 2022-01-20
- Published: 2022-08-18
- Granted: 2024-02-20
- Earliest claimed: 2021-02-18
- Assignees: Micron Technology, Inc.
- Applicants: Micron Technology, Inc.
- Inventors: Paolo Papa; Luigi Esposito; Massimo Iaculo; Giuseppe D'Eliseo; Alberto Sassara; Carminantonio Manganelli; Salvatore Del Prete
- Web page: https://patentgrep.com/patent/US11907556B2

## CPC

- G06F 3/064: {Management of blocks}
- G06F 3/0604: {Improving or facilitating administration, e.g. storage management}
- G06F 3/0608: {Saving storage space on storage systems}
- G06F 3/0652: {Erasing, e.g. deleting, data cleaning, moving of data to a wastebasket}
- G06F 3/0688: {Non-volatile semiconductor memory arrays}
- G06F 12/0246: {in block erasable memory, e.g. flash memory}
- G06F 12/0646: {Configuration or reconfiguration}
- G06F 2212/1024: Latency reduction
- G06F 2212/1044: Space efficiency improvement
- G06F 2212/657: Virtual address space management
- G06F 2212/7201: Logical to physical mapping or translation of blocks or pages
- G06F 2212/7205: Cleaning, compaction, garbage collection, erase control
- G06F 2212/7209: Validity control, e.g. using flags, time stamps or sequence numbers
- G06F 2212/7211: Wear leveling
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

Methods, systems, and devices for data relocation operation techniques are described. A memory system may include blocks of memory cells, for example, within a non-volatile memory device of the memory system. The memory system may identify a command to perform a data relocation operation associated with a block of memory cells and may select between a first procedure and a second procedure for performing the data relocation operation. The memory system may select between the first procedure and the second procedure based on whether one or more parameters associated with the data relocation operation satisfy a threshold. For example, the memory system may select the first procedure if the one or more parameters satisfy the threshold and may select the second procedure if the one or more parameters do not satisfy the threshold. The memory system may perform the data relocation operation using the selected procedure.

## Claims

### Claim 1

A memory system, comprising:
one or more memory devices; and
processing circuitry coupled with the one or more memory devices and configured to cause the memory system to:
identify a command to perform a data relocation operation associated with a block of memory cells of the memory system;
select between a first procedure for performing the data relocation operation and a second procedure for performing the data relocation operation based at least in part on whether one or more parameters associated with the data relocation operation satisfy a threshold;
perform the data relocation operation using the first procedure or the second procedure based at least in part on identifying the command and selecting between the first procedure and the second procedure; and
determine whether to update a mapping that indicates relationships between logical addresses and physical addresses based at least in part on whether the data relocation operation is performed using the first procedure or the second procedure.

### Claim 2 (depends on 1)

The memory system of claim 1, wherein the processing circuitry is further configured to cause the memory system to:
determine whether the one or more parameters associated with the data relocation operation satisfy the threshold, wherein:
selecting between the first procedure and the second procedure comprises selecting the first procedure based at least in part on determining that the one or more parameters satisfy the threshold; and
performing the data relocation operation using the first procedure or the second procedure comprises performing the data relocation operation using the first procedure based at least in part on selecting the first procedure.

### Claim 3 (depends on 2)

The memory system of claim 2, wherein, to perform the data relocation operation using the first procedure, the processing circuitry is further configured to cause the memory system to:
read data stored at the block of memory cells; and
write, to a second block of memory cells, the data read from the block of memory cells.

### Claim 4 (depends on 3)

The memory system of claim 3, wherein:
the block of memory cells comprises one or more pages associated with valid data and one or more pages associated with invalid data; and
the processing circuitry is further configured to cause the memory system to write the one or more pages associated with valid data and the one or more pages associated with invalid data to the second block of memory cells based at least in part on performing the data relocation operation using the first procedure.

### Claim 5 (depends on 3)

The memory system of claim 3, wherein the processing circuitry is further configured to cause the memory system to:
update a first entry of a second mapping that maps indices associated with blocks of memory cells to groups of blocks of memory cells based at least in part on performing the data relocation operation using the first procedure, the updated first entry comprising a first index associated with the second block of memory cells, a second index associated with a first group of blocks of memory cells comprising the second block of memory cells, and an offset of the second block of memory cells within the first group of blocks of memory cells.

### Claim 6 (depends on 2)

The memory system of claim 2, wherein the processing circuitry is further configured to cause the memory system to:
refrain from updating the mapping based at least in part on performing the data relocation operation using the first procedure.

### Claim 7 (depends on 2)

The memory system of claim 2, wherein, to determine whether the one or more parameters satisfy the threshold, the processing circuitry is further configured to cause the memory system to:
maintain a counter associated with the block of memory cells that tracks a quantity of pages of the block of memory cells that are associated with valid data; and
determine whether the quantity of pages of the block of memory cells that are associated with valid data satisfies a threshold quantity of pages associated with valid data.

### Claim 8 (depends on 1)

The memory system of claim 1, wherein the processing circuitry is further configured to cause the memory system to:
determine whether the one or more parameters do not satisfy the threshold, wherein:
selecting between the first procedure and the second procedure comprises selecting the second procedure based at least in part on determining that the one or more parameters do not satisfy the threshold; and
performing the data relocation operation using the first procedure or the second procedure comprises performing the data relocation operation using the second procedure based at least in part on selecting the second procedure.

### Claim 9 (depends on 8)

The memory system of claim 8, wherein, to perform the data relocation operation using the second procedure, the processing circuitry is further configured to cause the memory system to:
write pages of the block of memory cells that are associated with valid data to a second block of memory cells; and
update the mapping to map logical addresses associated with the pages written to the second block of memory cells to corresponding physical addresses of the second block of memory cells.

### Claim 10 (depends on 1)

The memory system of claim 1, wherein the processing circuitry is further configured to cause the memory system to:
receive the command to perform the data relocation operation from a host system coupled with the memory system, wherein identifying the command to perform the data relocation operation is based at least in part on receiving the command to perform the data relocation operation from the host system.

### Claim 11 (depends on 1)

The memory system of claim 1, wherein the processing circuitry is further configured to cause the memory system to:
initiate, by the memory system, the data relocation operation, wherein identifying the command to perform the data relocation operation is based at least in part on initiating the data relocation operation.

### Claim 12 (depends on 1)

The memory system of claim 1, wherein the one or more parameters associated with the data relocation operation comprise a percentage of pages of the block of memory cells comprising valid data, a latency associated with the data relocation operation, a type of the data relocation operation, a state of a host system coupled with the memory system, or any combination thereof.

### Claim 13 (depends on 1)

The memory system of claim 1, wherein a non-volatile memory device of the memory system comprises the block of memory cells.

### Claim 14

A non-transitory computer-readable medium storing code comprising instructions which, when executed by one or more processors of a memory system, cause the memory system to:
identify a command to perform a data relocation operation associated with a block of memory cells of the memory system;
select between a first procedure for performing the data relocation operation and a second procedure for performing the data relocation operation based at least in part on whether one or more parameters associated with the data relocation operation satisfy a threshold;
perform the data relocation operation using the first procedure or the second procedure based at least in part on identifying the command and selecting between the first procedure and the second procedure; and
determine whether to update a mapping that indicates relationships between logical addresses and physical addresses based at least in part on whether the data relocation operation is performed using the first procedure or the second procedure.

### Claim 15 (depends on 14)

The non-transitory computer-readable medium of claim 14, wherein the instructions, when executed by the one or more processors of the memory system, further cause the memory system to:
determine whether the one or more parameters satisfy the threshold, wherein:
selecting between the first procedure and the second procedure comprises selecting the first procedure based at least in part on determining that the one or more parameters satisfy the threshold; and
performing the data relocation operation using the first procedure or the second procedure comprises performing the data relocation operation using the first procedure based at least in part on selecting the first procedure.

### Claim 16 (depends on 15)

The non-transitory computer-readable medium of claim 15, wherein, to perform the data relocation operation using the first procedure, the instructions, when executed by the one or more processors of the memory system, further cause the memory system to:
read data stored at the block of memory cells; and
write, to a second block of memory cells, the data read from the block of memory cells.

### Claim 17 (depends on 16)

The non-transitory computer-readable medium of claim 16, wherein:
the block of memory cells comprises one or more pages associated with valid data and one or more pages associated with invalid data; and
the instructions, when executed by the one or more processors of the memory system, further cause the memory system to write the one or more pages associated with valid data and the one or more pages associated with invalid data to the second block of memory cells based at least in part on performing the data relocation operation using the first procedure.

### Claim 18 (depends on 16)

The non-transitory computer-readable medium of claim 16, wherein the instructions, when executed by the one or more processors of the memory system, further cause the memory system to:
update a first entry of a second mapping that maps indices associated with blocks of memory cells to groups of blocks of memory cells based at least in part on performing the data relocation operation using the first procedure, the updated first entry comprising a first index associated with the second block of memory cells, a second index associated with a first group of blocks of memory cells comprising the second block of memory cells, and an offset of the second block of memory cells within the first group of blocks of memory cells.

### Claim 19 (depends on 15)

The non-transitory computer-readable medium of claim 15, wherein the instructions, when executed by the one or more processors of the memory system, further cause the memory system to:
refrain from updating the mapping based at least in part on performing the data relocation operation using the first procedure.

### Claim 20

A method performed by a memory system, comprising:
identifying a command to perform a data relocation operation associated with a block of memory cells of the memory system;
selecting between a first procedure for performing the data relocation operation and a second procedure for performing the data relocation operation based at least in part on whether one or more parameters associated with the data relocation operation satisfy a threshold;
performing the data relocation operation using the first procedure or the second procedure based at least in part on identifying the command and selecting between the first procedure and the second procedure; and
determining whether to update a mapping that indicates relationships between logical addresses and physical addresses based at least in part on whether the data relocation operation is performed using the first procedure or the second procedure.

### Claim 21 (depends on 20)

The method of claim 20, further comprising:
determining whether the one or more parameters satisfy the threshold, wherein:
selecting between the first procedure and the second procedure comprises selecting the first procedure based at least in part on determining that the one or more parameters satisfy the threshold; and
performing the data relocation operation using the first procedure or the second procedure comprises performing the data relocation operation using the first procedure based at least in part on selecting the first procedure.

### Claim 22 (depends on 21)

The method of claim 21, wherein performing the data relocation operation using the first procedure comprises:
reading data stored at the block of memory cells; and
writing, to a second block of memory cells, the data read from the block of memory cells.

### Claim 23 (depends on 22)

The method of claim 22, wherein the block of memory cells comprises one or more pages associated with valid data and one or more pages associated with invalid data, the method comprising:
writing the one or more pages associated with valid data and the one or more pages associated with invalid data to the second block of memory cells based at least in part on performing the data relocation operation using the first procedure.

### Claim 24 (depends on 22)

The method of claim 22, further comprising:
updating a first entry of a second mapping that maps indices associated with blocks of memory cells to groups of blocks of memory cells based at least in part on performing the data relocation operation using the first procedure, the updated first entry comprising a first index associated with the second block of memory cells, a second index associated with a first group of blocks of memory cells comprising the second block of memory cells, and an offset of the second block of memory cells within the first group of blocks of memory cells.

### Claim 25 (depends on 21)

The method of claim 21, further comprising:
refraining from updating the mapping based at least in part on performing the data relocation operation using the first procedure.
