# US 11,907,155 B2 · Bus system connecting slave devices with single-wire data access communication > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,907,155 B2 - Document ID: US11907155B2 - Status: Granted - Kind: B2 - Application number: 17/574,090 - Filed: 2022-01-12 - Published: 2022-10-13 - Granted: 2024-02-20 - Earliest claimed: 2021-04-13 - Assignees: Nuvoton Technology Corporation - Applicants: Nuvoton Technology Corporation - Inventors: Kang-Fu Chiu; Chih-Hung Huang; Hao-Yang Chang - Web page: https://patentgrep.com/patent/US11907155B2 ## CPC - G06F 13/4282: {on a serial bus, e.g. I2C bus, SPI bus (on daisy chain buses G06F13/4247)} - G06F 2213/0002: Serial port, e.g. RS232C - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract A bus system is provided. A plurality of slave devices are electrically connected to a master device through an enhanced serial peripheral interface (eSPI) bus. Each slave device has an alert handshake pin. The alert handshake pins of the slave devices are electrically connected together via an alert handshake control line. In a first phase of a plurality of phases in each assignment period of an assignment stage after a synchronization stage, the first slave device is configured to control the alert handshake control line to a second voltage level via the alert handshake pin. In the phases of each of the assignment periods except for the first phase, a first slave device of the slave devices is configured to control the alert handshake control line to communicate with the slave devices via the alert handshake pin. The first phase corresponds to a first slave device. ## Claims ### Claim 1 A bus system, comprising: a master device; an enhanced serial peripheral interface (eSPI) bus; and a plurality of slave devices electrically connected to the master device via the eSPI bus, wherein each of the plurality of slave devices has an alert handshake pin, and the alert handshake pins of the plurality of slave devices are electrically connected together via an alert handshake control line, wherein when the alert handshake control line is at a first voltage level and a first slave device of the slave devices wants to communicate with the master device, the first slave device is configured to control the alert handshake control line to a second voltage level via the alert handshake pin, so as to control the plurality of slave devices to enter a synchronization stage, wherein in a first phase of a plurality of phases of each of assignment periods in an assignment stage after the synchronization stage, the first slave device is configured to control the alert handshake control line to the second voltage level via the alert handshake pin, and in the phases of each of the assignment periods except for the first phase, the first slave device is configured to control the alert handshake control line to communicate with the plurality of slave devices other than the first slave device via the alert handshake pin, so as to transmit commands or data to other slave devices via the alert handshake control line, wherein the first phase corresponds to the first slave device; wherein in the phases of a first assignment period of the assignment stage except for the first phase, the first slave device is configured to control the alert handshake control line to transmit a target identification to the plurality of slave devices other than the first slave device via the alert handshake pin, so as to communicate with a second slave device of the plurality of slave devices corresponding to the target identification. ### Claim 2 (depends on 1) The bus system as claimed in claim 1, wherein in the phases of a second assignment period of the assignment stage except for the first phase, the first slave device is configured to control the alert handshake control line to transmit a first command to the second slave device via the alert handshake pin, wherein the first assignment period is between the second assignment period and the synchronization phase. ### Claim 3 (depends on 1) The bus system as claimed in claim 1, wherein when the slave device other than the first slave device detects that the alert handshake control line is at the second voltage level in the first stage of each of the assignment periods, the slave device other than the first slave device is configured to further determine whether to communicate with the first slave device according to the target identification. ### Claim 4 (depends on 2) The bus system as claimed in claim 2, wherein in response to the first command, the second slave device is configured to receive and store the data from the first slave device via the alert handshake control line, wherein the received data comprises a key or data to be computed. ### Claim 5 (depends on 4) The bus system as claimed in claim 4, wherein the second slave device is configured to determine whether to communicate with the master device according to the received data or the first command. ### Claim 6 (depends on 1) The bus system as claimed in claim 1, further comprising: a plurality of peripheral devices electrically connected to the plurality of slave devices via the alert handshake control line, wherein in the phases of each of the assignment periods except the first phase, the first slave device is configured to control the plurality of peripheral devices via the alert handshake control line. ### Claim 7 (depends on 1) The bus system as claimed in claim 1, further comprising: a plurality of peripheral devices, wherein each of the peripheral devices is electrically connected to a respective slave device, wherein in the phases of each of the assignment periods except the first phase, the first slave device is configured to communicate with the slave device other than the first slave device via the alert handshake control line, so as to control the peripheral device electrically connected to the slave device other than the first slave device. ### Claim 8 (depends on 1) The bus system as claimed in claim 1, wherein in the phases of each of the assignment periods except the first phase, the first slave device is configured to further communicate with the master device via the eSPI bus, so as to obtain a second command from the master device, and to provide a third command corresponding to the second command to the slave devices other than the first slave device via the alert handshake control line. ### Claim 9 A bus system, comprising: a master device; an enhanced serial peripheral interface (eSPI) bus; and a plurality of slave devices electrically connected to the master device via the eSPI bus, wherein each of the plurality of slave devices has an alert handshake pin, and the alert handshake pins of the plurality of slave devices are electrically connected together via an alert handshake control line, wherein when the alert handshake control line is at a first voltage level and a first slave device of the slave devices wants to communicate with the master device, the first slave device is configured to control the alert handshake control line to a second voltage level via the alert handshake pin, so as to control the plurality of slave devices enter a synchronization stage, wherein after the synchronization stage, the plurality of slave devices other than the first slave device are configured to detect the alert handshake control line in a plurality of phases of each of assignment periods in an assignment stage except for a first phase of the phases, to determine whether to receive commands or data from the first slave device via the alert handshake control line, wherein the first phase corresponds to the first slave device; wherein in the phases of a first assignment period of the assignment stage except for the first phase, the first slave device is configured to control the alert handshake control line to transmit a target identification to the plurality of slave devices other than the first slave device via the alert handshake pin, so as to communicate with a second slave device of the plurality of slave devices corresponding to the target identification. ### Claim 10 (depends on 9) The bus system as claimed in claim 9, wherein in the first stage of each of the assignment periods of the assignment stage, the first slave device is configured to control the alert handshake control line to the second voltage level via the alert handshake pin. ### Claim 11 (depends on 9) The bus system as claimed in claim 9, wherein in the phases of a second assignment period of the assignment stage except for the first phase, the first slave device is configured to control the alert handshake control line to transmit a first command to the second slave device via the alert handshake pin, wherein the first assignment period is between the second assignment period and the synchronization phase. ### Claim 12 (depends on 9) The bus system as claimed in claim 9, wherein when the slave device other than the first slave device detects that the alert handshake control line is at the second voltage level in the first stage of each of the assignment periods, the slave device other than the first slave device is configured to further determine whether to communicate with the first slave device according to the target identification. ### Claim 13 (depends on 11) The bus system as claimed in claim 11, wherein in response to the first command, the second slave device is configured to receive and store the data from the first slave device via the alert handshake control line, wherein the received data comprises a key or data to be computed. ### Claim 14 (depends on 13) The bus system as claimed in claim 13, wherein the second slave device is configured to determine whether to communicate with the master device according to the received data or the first command. ### Claim 15 (depends on 9) The bus system as claimed in claim 9, wherein when the plurality of slave devices determine the alert handshake control line is maintained in the first voltage level in the phases of each of the assignment periods, the plurality of slave devices are configured to determine that the master device does not communicate with the plurality of slave devices. ### Claim 16 (depends on 9) The bus system as claimed in claim 9, further comprising: a plurality of peripheral devices electrically connected to the plurality of slave devices via the alert handshake control line, wherein in the phases of each of the assignment periods except the first phase, the first slave device is configured to control the peripheral devices via the alert handshake control line to communicate with the peripheral devices. ### Claim 17 (depends on 9) The bus system as claimed in claim 9, further comprising: a plurality of peripheral devices, wherein each of the peripheral devices is electrically connected to a respective slave device, wherein in the phases of each of the assignment periods except the first phase, the first slave device is configured to communicate with the slave device other than the first slave device via the alert handshake control line, so as to control the peripheral device electrically connected to the slave device other than the first slave device. ### Claim 18 (depends on 9) The bus system as claimed in claim 9, wherein in the phases of each of the assignment periods except the first phase, the first slave device is configured to further communicate with the master device via the eSPI bus, so as to obtain a second command from the master device, and to provide a third command corresponding to the second command to the slave devices other than the first slave device via the alert handshake control line.