# US 11,907,070 B2 · Methods and apparatus for managing register free lists > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,907,070 B2 - Document ID: US11907070B2 - Status: Granted - Kind: B2 - Application number: 17/390,293 - Filed: 2021-07-30 - Published: 2023-02-02 - Granted: 2024-02-20 - Earliest claimed: 2021-07-30 - Assignees: Advanced Micro Devices, Inc. - Applicants: Advanced Micro Devices, Inc. - Inventors: Eric Busta; Michael L. Golden; Sean M. O′Mullan; James Wingfield; Keith A. Kasprak; Russell Schreiber; Michael Estlick - Web page: https://patentgrep.com/patent/US11907070B2 ## CPC - G06F 11/1417: {Boot up procedures} - G06F 11/27: Built-in tests - G06F 9/3013: {according to data content, e.g. floating-point registers, address registers} - G06F 9/5011: {the resources being hardware resources other than CPUs, Servers and Terminals} - G06F 11/0772: {Means for error signaling, e.g. using interrupts, exception flags, dedicated error registers} - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract An integrated circuit includes one or more processing units that execute instructions that employ a register file, control logic creates a pre-startup register free list, prior to normal operation of at least one of the processing units, that includes a list of registers devoid of defective registers. In some implementations, no column and row repair information is provided to register file repair logic. In certain examples, the register file is configured as a repair-less register file. During normal operation of the one or more processing units, the integrated circuit employs the pre-startup register free list to select registers in a register file for the executing instructions. Associated methods are also presented. ## Claims ### Claim 1 An integrated circuit comprising: one or more processing units that execute instructions that employ a register file; and control logic, operative to: create a pre-startup register free list, prior to normal operation of at least one of the one or more processing units, that comprises a list of registers devoid of defective registers; and during normal operation of the one or more processing units, employ the pre-startup register free list to select registers in the register file for executing instructions. ### Claim 2 (depends on 1) The integrated circuit of claim 1 wherein the control logic is operative to maintain, during normal operation, a register free list to only contain a plurality of registers that were on the pre-startup register free list to allocate and re-allocate registers in connection with a register file. ### Claim 3 (depends on 1) The integrated circuit of claim 1 comprising the register file configured as a repair-less register file. ### Claim 4 (depends on 1) The integrated circuit of claim 1 comprising a built-in-self-test (BIST) logic operative to detect defective registers prior to normal operation and generate a defective register list for the control logic indicating which registers of a plurality of registers are defective. ### Claim 5 (depends on 4) The integrated circuit of claim 4 wherein the control logic is operative to remove register entries from the pre-startup register free list prior to startup based on the defective register list. ### Claim 6 (depends on 1) The integrated circuit of claim 1 comprising a floating-point unit (FPU) comprising the one or more processing units and wherein the register file comprises a floating point unit register file. ### Claim 7 (depends on 1) The integrated circuit of claim 1 wherein the control logic is operative to maintain a same number of defective registers on a defective list even if a register is not defective. ### Claim 8 (depends on 1) The integrated circuit of claim 1 wherein the control logic is operative to: create a pre-startup register free list for each of a plurality of processing units, prior to normal operation of each of the plurality of processing units, wherein each respective pre-startup register free list comprises a list of registers devoid of registers that have been detected to be defective; and during normal operation of each of plurality of processing units, employ a respective pre-startup register free list to select registers in a respective register file for the plurality of processing units. ### Claim 9 (depends on 1) The integrated circuit of claim 1 wherein the control logic is configured to, in response to a detection of one or more registers being defective out of a plurality of registers, create a pre-startup register free list, prior to normal operation of at least one of the one or more processing units, that comprises a list of registers devoid of the one or more defective registers. ### Claim 10 A method carried out by one or more processing units comprising: create a pre-startup register free list, prior to normal operation of at least one of the one or more processing units, that comprises a list of registers devoid of defective registers; and during normal operation of the one or more processing units, employ the pre-startup register free list to select registers in a register file for executing instructions. ### Claim 11 (depends on 10) The method of claim 10 comprising maintaining, during normal operation, a register free list to only contain a plurality of registers that were on the pre-startup register free list to allocate and re-allocate registers in connection with a register file. ### Claim 12 (depends on 10) The method of claim 10 comprising detecting, by built-in-self-test (BIST) logic defective registers prior to normal operation and generate a defective register list for control logic indicating which registers of a plurality of registers are defective. ### Claim 13 (depends on 12) The method of claim 12 comprising removing register entries from the pre-startup register free list prior to startup based on the defective register list. ### Claim 14 (depends on 10) The method of claim 10 comprising maintaining a same number of defective registers on a defective list even if a register is not defective. ### Claim 15 (depends on 10) The method of claim 10 comprising: creating a pre-startup register free list for each of a plurality of processing units, prior to normal operation of each of the plurality of processing units, wherein each respective pre-startup register free list comprises a list of registers devoid of defective registers; and during normal operation of each of plurality of processing units, employing a respective pre-startup register free list to select registers in a respective register file for the plurality of processing units. ### Claim 16 (depends on 10) The method of claim 10 comprising in response to a detection of one or more registers being defective out of a plurality of registers, creating a pre-startup register free list, prior to normal operation of at least one of the one or more processing units, that comprises a list of registers devoid of the one or more defective registers. ### Claim 17 An integrated circuit comprising: one or more floating point units; a floating point unit register file, operatively coupled to the one or more floating point units; built-in-self-test (BIST) logic operative to detect defective registers of the floating point unit register file prior to start-up of the one or more floating point units; and control logic, operative to: create a pre-startup register free list, prior to normal operation of at least one of the one or more floating point units, that comprises a list of registers devoid of defective registers detected by the BIST logic; and during normal operation of the one or more floating point units, employ the pre-startup register free list to select registers in the floating point unit register file for executing instructions for the one or more floating point units. ### Claim 18 (depends on 17) The integrated circuit of claim 17 wherein the control logic is operative to maintain, during normal operation, a register free list to only contain a plurality of registers that were on the pre-startup register free list to allocate and re-allocate registers in connection with the floating point unit register file. ### Claim 19 (depends on 17) The integrated circuit of claim 17 comprising the floating point unit register file configured as a repair-less floating point unit register file. ### Claim 20 (depends on 17) The integrated circuit of claim 17 wherein the control logic is operative to remove register entries from the pre-startup register free list prior to startup based on a defective register list. ### Claim 21 (depends on 17) The integrated circuit of claim 17 wherein the control logic is operative to maintain a same number of defective registers on a defective list even if a register is not defective. ### Claim 22 (depends on 17) The integrated circuit of claim 17 wherein the control logic is operative to: create a pre-startup register free list for each of a plurality of floating point units, prior to normal operation of each of the plurality of floating point units, wherein each respective pre-startup register free list comprises a list of registers devoid of defective registers by the BIST logic; and during normal operation of each of the plurality of floating point units, employ a respective pre-startup register free list to select registers in a respective register file for the plurality of floating point units.