# US 11,907,066 B2 · Managing storage of multiple plane parity data in a memory sub-system

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- Number: US 11,907,066 B2
- Document ID: US11907066B2
- Status: Granted
- Kind: B2
- Application number: 17/734,444
- Filed: 2022-05-02
- Published: 2022-08-18
- Granted: 2024-02-20
- Earliest claimed: 2019-12-31
- Assignees: Micron Technology, Inc.
- Applicants: Micron Technology, Inc.
- Inventors: Xiangang Luo; Jianmin Huang; Lakshmi Kalpana Vakati; Harish R. Singidi
- Web page: https://patentgrep.com/patent/US11907066B2

## CPC

- G06F 11/1076: {Parity data used in redundant arrays of independent storages, e.g. in RAID systems}
- G06F 12/0246: {in block erasable memory, e.g. flash memory}
- G06F 3/0619: {in relation to data integrity, e.g. data losses, bit errors}
- G06F 3/0659: {Command handling arrangements, e.g. command buffers, queues, command scheduling}
- G06F 3/0673: {Single storage device}
- G06F 11/108: {Parity data distribution in semiconductor storages, e.g. in SSD}
- G06F 12/0866: for peripheral storage systems, e.g. disk cache
- G06F 12/0875: with dedicated cache, e.g. instruction or stack
- G06F 2212/1032: Reliability improvement, data loss prevention, degraded operation etc
- G06F 2212/403: Error protection encoding, e.g. using parity or ECC codes
- G06F 2212/7203: Temporary buffering, e.g. using volatile buffer or dedicated buffer blocks
- G06F 2212/7208: Multiple device management, e.g. distributing data over multiple flash devices
- G06F 2212/7209: Validity control, e.g. using flags, time stamps or sequence numbers
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

A parity generation operation based on a set of multiple planes of host data is executed to generate a set of multi-page parity data. The set of multi-page parity data is stored in a cache memory of a memory device. A data recovery operation is performed based on the set of multi-page parity data.

## Claims

### Claim 1

A method comprising:
executing a first parity generation operation based on a set of multiple planes of host data to generate a set of multi-page parity data associated with a memory device;
storing the set of multi-page parity data in a cache memory of the memory device;
executing a second parity generation operation based on multiple sub-blocks of the host data to generate multi-plane multi-sub-block parity data; and
in response to a multi-plane failure, performing, by a processing device, a data recovery operation based on the set of multi-page parity data and the multi-plane multi-sub-block parity data associated with the host data.

### Claim 2 (depends on 1)

The method of claim 1, further comprising receiving, by the processing device, the host data to be written to a storage area comprising the set of multiple planes.

### Claim 3 (depends on 1)

The method of claim 1, further comprising generating the set of multi-plane parity data associated with the host data.

### Claim 4 (depends on 3)

The method of claim 3, wherein the multi-plane multi-sub-block parity data is generated by executing an exclusive or (XOR) operation, and wherein the multi-plane multi-sub-block parity data comprises a set of XOR parity values.

### Claim 5 (depends on 3)

The method of claim 3, further comprising storing the multi-plane multi-sub-block parity data in the cache memory of the memory device.

### Claim 6 (depends on 3)

The method of claim 3, wherein the multi-plane multi-sub-block parity data is generated based on a portion of the set of multiple planes comprising less than a total number of planes of the host data.

### Claim 7

A non-transitory computer readable medium comprising instructions, which when executed by a processing device, cause the processing device to perform operations comprising:
executing a first parity generation operation based on a set of multiple planes of host data to generate a set of multi-page parity data associated with a memory device;
storing the set of multi-page parity data in a cache memory of the memory device;
executing a second parity generation operation based on multiple sub-blocks of the host data to generate multi-plane multi-sub-block parity data; and
in response to a multi-plane failure, performing, by a processing device, a data recovery operation based on the set of multi-page parity data and the multi-plane multi-sub-block parity data associated with the host data.

### Claim 8 (depends on 7)

The non-transitory computer readable medium of claim 7, the operations further comprising receiving, by the processing device, the host data to be written to a storage area comprising the set of multiple planes.

### Claim 9 (depends on 7)

The non-transitory computer readable medium of claim 7, the operations further comprising generating the set of multi-plane parity data associated with the host data.

### Claim 10 (depends on 9)

The non-transitory computer readable medium of claim 9, wherein the multi-plane multi-sub-block parity data is generated by executing an exclusive or (XOR) operation, and wherein of multi-plane multi-sub-block parity data comprises a set of XOR parity values.

### Claim 11 (depends on 9)

The non-transitory computer readable medium of claim 9, the operations further comprising storing the multi-plane multi-sub-block parity data in the cache memory of the memory device.

### Claim 12 (depends on 9)

The non-transitory computer readable medium of claim 9, wherein the multi-plane multi-sub-block parity data is generated based on a portion of the set of multiple planes comprising less than a total number of planes of the host data.

### Claim 13

A system comprising:
a memory device; and
a processing device, operatively coupled with the memory device, to perform operations comprising:
executing a first parity generation operation based on a set of multiple planes of host data to generate a set of multi-page parity data associated with a memory device;
storing the set of multi-page parity data in a cache memory of the memory device;
executing a second parity generation operation based on multiple sub-blocks of the host data to generate multi-plane multi-sub-block parity data; and
in response to a multi-plane failure, performing, by a processing device, a data recovery operation based on the set of multi-page parity data and of the multi-plane multi-sub-block parity data associated with the host data.

### Claim 14 (depends on 13)

The system of claim 13, the operations further comprising receiving, by the processing device, the host data to be written to a storage area comprising the set of multiple planes.

### Claim 15 (depends on 13)

The system of claim 13, the operations further comprising generating the set of multi-plane parity data associated with the host data.

### Claim 16 (depends on 15)

The system of claim 15, wherein the multi-plane multi-sub-block parity data is generated by executing an exclusive or (XOR) operation, and wherein the multi-plane multi-sub-block parity data comprises a set of XOR parity values.

### Claim 17 (depends on 13)

The system of claim 13, the operations further comprising storing the multi-plane multi-sub-block parity data in the cache memory of the memory device.