# US 11,907,059 B2 · Abnormal power loss recovery method, memory control circuit unit, and memory storage device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,907,059 B2 - Document ID: US11907059B2 - Status: Granted - Kind: B2 - Application number: 17/715,050 - Filed: 2022-04-07 - Published: 2023-09-21 - Granted: 2024-02-20 - Earliest claimed: 2022-03-18 - Assignees: Phison Electronics Corp. - Applicants: Phison Electronics Corp. - Inventors: Kok-Yong Tan - Web page: https://patentgrep.com/patent/US11907059B2 ## CPC - G06F 1/28: Supervision thereof, e.g. detecting power-supply failure by out of limits supervision - G06F 11/0793: {Remedial or corrective actions (recovery from an exception in an instruction pipeline G06F9/3861; by retry G06F11/1402; for recovering from a failure of a protocol instance or entity H04L69/40)} - G06F 1/30: Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations (for resetting only G06F1/24) - G06F 3/0619: {in relation to data integrity, e.g. data losses, bit errors} - G06F 3/0625: {Power saving in storage systems} - G06F 3/065: {Replication mechanisms} - G06F 3/0679: {Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]} - G06F 3/0689: {Disk arrays, e.g. RAID, JBOD} - G06F 11/073: {in a memory management context, e.g. virtual memory or cache management (memory management G06F12/00; testing of static memory units G11C29/00)} - G06F 11/108: {Parity data distribution in semiconductor storages, e.g. in SSD} - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract An abnormal power loss recovery method, a memory control circuit unit, and a memory storage device are provided. The method is configured for a memory storage device including a rewritable non-volatile memory module having a plurality of super-physical units. The super-physical units include at least two physical erasing units, and each of the physical erasing units belongs to a different operation unit and includes a plurality of physical programming units. The method includes: reading data stored in a first super-physical unit without a corresponding RAID ECC code when a memory storage device is powered on again and detected as an abnormal power loss to obtain first data, and the first super-physical unit is a last super-physical unit to which data is written before the abnormal power loss occurs; and copying the first data to a second super-physical unit. ## Claims ### Claim 1 An abnormal power loss recovery method, configured for a memory storage device comprising a rewritable non-volatile memory module, wherein the rewritable non-volatile memory module comprises a plurality of super-physical units, the super-physical units comprise at least two physical erasing units, the at least two physical erasing units belong to different operation units and each of the physical erasing units comprises a plurality of physical programming units, and the abnormal power loss recovery method comprises: reading data stored in a first super-physical unit without a corresponding RAID ECC code when the memory storage device is powered on again and detected as an abnormal power loss to obtain first data, wherein the first super-physical unit is a last super-physical unit to which data is written before the abnormal power loss occurs; and copying the first data to a second super-physical unit, wherein before reading the data stored in the first super-physical unit without the corresponding RAID ECC code to obtain the first data, the method further comprises: scanning the first super-physical unit to obtain an amount of written data of the first super-physical unit when the memory storage device is powered on again and detected as the abnormal power loss; determining whether the amount of written data is greater than a first threshold value; and reading all data stored in the first super-physical unit to obtain second data, and copying the second data to the second super-physical unit in response to the amount of written data not being greater than the first threshold value. ### Claim 2 (depends on 1) The abnormal power loss recovery method of claim 1, further comprises: obtaining the first data and copying the first data to the second super-physical unit in response to the amount of written data being greater than the first threshold value. ### Claim 3 (depends on 2) The abnormal power loss recovery method of claim 2, wherein the first threshold value is determined according to a capacity of the first super-physical unit. ### Claim 4 (depends on 2) The abnormal power loss recovery method of claim 2, wherein the first threshold value is ⅓ of a capacity of the first super-physical unit. ### Claim 5 (depends on 1) The abnormal power loss recovery method of claim 1, wherein after copying the first data to the second super-physical unit, the method further comprises: receiving a write command from a host system, and writing data instructed by the write command to the second super-physical unit following the first data. ### Claim 6 (depends on 1) The abnormal power loss recovery method of claim 1, wherein after copying the first data to the second super-physical unit, the method further comprises: determining whether an idle time elapsed from a last writing to a present in the plurality of super-physical units is greater than a predetermined time; and reading data other than the first data in the first super-physical unit to obtain third data and copying the third data to a third super-physical unit in response to the idle time being greater than the predetermined time. ### Claim 7 (depends on 1) The abnormal power loss recovery method of claim 1, wherein the method further comprises: determining that the first super-physical unit is a first type physical unit or a second type physical unit; reading the first data and copying the first data to the second super-physical unit in response to the first super-physical unit being the first type physical unit; and not copying data stored in the first super-physical unit in response to the second super-physical unit being the second type physical unit. ### Claim 8 (depends on 7) The abnormal power loss recovery method of claim 7, wherein a first total number of physical programming units in an erased state in the first type physical unit is different from a second total number of physical programming units in the erased state in the second type physical unit. ### Claim 9 (depends on 8) The abnormal power loss recovery method of claim 8, wherein the first total number is not zero, and the second total number is zero. ### Claim 10 A memory control circuit unit, configured to control a memory storage device, wherein the memory storage device comprises a rewritable non-volatile memory module, and the memory control circuit unit comprises: a host interface configured to be coupled to a host system; a memory interface configured to be coupled to the rewritable non-volatile memory module, wherein the rewritable non-volatile memory module comprises a plurality of super-physical units, the super-physical units comprise at least two physical erasing units, and the at least two physical erasing units belong to different operation units and each of the physical erasing units comprises a plurality of physical programming units; and a memory management circuit coupled to the host interface and the memory interface, wherein the memory management circuit is further configured to read data stored in a first super-physical unit without a corresponding RAID ECC code when the memory storage device is powered on again and detected as an abnormal power loss to obtain first data, wherein the first super-physical unit is a last super-physical unit to which data is written before the abnormal power loss occurs, and the memory management circuit is further configured to copy the first data to a second super-physical unit, wherein before the operation of reading the data stored in the first super-physical unit without the corresponding RAID ECC code to obtain the first data, the memory management circuit is further configured to: scan the first super-physical unit to obtain an amount of written data of the first super-physical unit when the memory storage device is powered on again and detected as the abnormal power loss; determine whether the amount of written data is greater than a first threshold value; and read all data stored in the first super-physical unit to obtain second data, and copy the second data to the second super-physical unit in response to the amount of written data not being greater than the first threshold value. ### Claim 11 (depends on 10) The memory control circuit unit of claim 10, wherein the memory management circuit is further configured to: obtain the first data and copy the first data to the second super-physical unit in response to the amount of written data being greater than the first threshold value. ### Claim 12 (depends on 11) The memory control circuit unit of claim 11, wherein the first threshold value is determined according to a capacity of the first super-physical unit. ### Claim 13 (depends on 11) The memory control circuit unit of claim 11, wherein the first threshold value is ⅓ of a capacity of the first super-physical unit. ### Claim 14 (depends on 10) The memory control circuit unit of claim 10, wherein after the operation of copying the first data to the second super-physical unit, the memory management circuit is further configured to receive a write command from the host system and write data indicated by the write command to the second super-physical unit following the first data. ### Claim 15 (depends on 10) The memory control circuit unit of claim 10, wherein after the operation of copying the first data to the second super-physical unit, the memory management circuit is further configured to determine whether an idle time elapsed from a last writing to a present in the plurality of super-physical units is greater than a predetermined time, and the memory management circuit is further configured to read data other than the first data in the first super-physical unit to obtain third data and copy the third data to a third super-physical unit in response to the idle time being greater than the predetermined time. ### Claim 16 (depends on 10) The memory control circuit unit of claim 10, wherein the memory management circuit is further configured to determine whether the first super-physical unit is a first type physical unit or a second type physical unit, the memory management circuit is further configured to read the first data and copy the first data to the second super-physical unit in response to the first super-physical unit being the first type physical unit, and the memory management circuit is further configured to not copy data stored in the first super-physical unit in response to the second super-physical unit being the second type physical unit. ### Claim 17 (depends on 16) The memory control circuit unit of claim 16, wherein a first total number of physical programming units in an erased state in the first type physical unit is different from a second total number of physical programming units in the erased state in the second type physical unit. ### Claim 18 (depends on 17) The memory control circuit unit of claim 17, wherein the first total number is not zero, and the second total number is zero. ### Claim 19 A memory storage device, comprising: a connection interface unit configured to be coupled to a host system; a rewritable non-volatile memory module, wherein the rewritable non-volatile memory module comprises a plurality of super-physical units, the super-physical units comprise at least two physical erasing units, and the at least two physical erasing units belong to different operation units and each of the physical erasing units comprises a plurality of physical programming units; and a memory control circuit unit coupled to the connection interface unit and the rewritable non-volatile memory module, wherein the memory control circuit unit is further configured to read data stored in a first super-physical unit without a corresponding RAID ECC code when the memory storage device is powered on again and detected as an abnormal power loss to obtain first data, wherein the first super-physical unit is a last super-physical unit to which data is written before the abnormal power loss occurs, and the memory control circuit unit is further configured to copy the first data to a second super-physical unit, wherein before the operation of reading the data stored in the first super-physical unit without the corresponding RAID ECC code to obtain the first data, the memory control circuit unit is further configured to: scan the first super-physical unit to obtain an amount of written data of the first super-physical unit when the memory storage device is powered on again and detected as the abnormal power loss; determine whether the amount of written data is greater than a first threshold value; and read all data stored in the first super-physical unit to obtain second data, and copy the second data to the second super-physical unit in response to the amount of written data not being greater than the first threshold value. ### Claim 20 (depends on 19) The memory storage device of claim 19, wherein the memory control circuit unit is further configured to: obtain the first data and copy the first data to the second super-physical unit in response to the amount of written data being greater than the first threshold value. ### Claim 21 (depends on 20) The memory storage device of claim 20, wherein the first threshold value is determined according to a capacity of the first super-physical unit. ### Claim 22 (depends on 20) The memory storage device of claim 20, wherein the first threshold value is ⅓ of a capacity of the first super-physical unit. ### Claim 23 (depends on 19) The memory storage device of claim 19, wherein after the operation of copying the first data to the second super-physical unit, the memory control circuit unit is further configured to receive a write command from the host system and write data indicated by the write command to the second super-physical unit following the first data. ### Claim 24 (depends on 19) The memory storage device of claim 19, wherein after the operation of copying the first data to the second super-physical unit, the memory control circuit unit is further configured to determine whether an idle time elapsed from a last writing to a present in the plurality of super-physical units is greater than a predetermined time, and the memory control circuit unit is further configured to read data other than the first data in the first super-physical unit to obtain third data and copy the third data to a third super-physical unit in response to the idle time being greater than the predetermined time. ### Claim 25 (depends on 19) The memory storage device of claim 19, wherein the memory control circuit unit is further configured to determine whether the first super-physical unit is a first type physical unit or a second type physical unit, the memory control circuit unit is further configured to read the first data and copy the first data to the second super-physical unit in response to the first super-physical unit being the first type physical unit, and the memory control circuit unit is further configured to not copy data stored in the first super-physical unit in response to the second super-physical unit being the second type physical unit. ### Claim 26 (depends on 25) The memory storage device of claim 25, wherein a first total number of physical programming units in an erased state in the first type physical unit is different from a second total number of physical programming units in the erased state in the second type physical unit. ### Claim 27 (depends on 26) The memory storage device of claim 26, wherein the first total number is not zero, and the second total number is zero.