# US 11,906,994 B2 · Power supply circuit, corresponding device and method

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- Number: US 11,906,994 B2
- Document ID: US11906994B2
- Status: Granted
- Kind: B2
- Application number: 17/836,524
- Filed: 2022-06-09
- Published: 2022-12-15
- Granted: 2024-02-20
- Earliest claimed: 2021-06-10
- Assignees: STMicroelectronics S.r.l.; STMicroelectronics (Rousset) SAS
- Applicants: STMicroelectronics S.r.l.; STMicroelectronics (Rousset) SAS
- Inventors: Daniele Mangano; Andrei Tudose; Francesco Clerici; Pasquale Butta'
- Web page: https://patentgrep.com/patent/US11906994B2

## CPC

- G05F 1/46: wherein the variable actually regulated by the final control device is DC (G05F1/625 takes precedence)
- G05F 1/468: {characterised by reference voltage circuitry, e.g. soft start, remote shutdown}
- G06F 1/26: Power supply means, e.g. regulation thereof (for memories G11C)
- G06F 1/3296: by lowering the supply or operating voltage
- G05F: SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

A voltage regulator is embedded in a circuit intermediate a first node (coupled to a battery) and a second node (supplying power to an external memory). The voltage regulator is activatable in a first mode of operation for startup during which an voltage is applied to the second node that increases towards a supply threshold. In response to the voltage at the second node reaching the supply threshold, the voltage regulator transitions to a second mode of operation where a programmable regulated voltage (higher than the supply threshold) is applied to the second node. In response to receipt of a low-power operation request, a first high-drive regulator circuitry is deactivated and a second low-power regulator circuitry is activated to provide a third mode of operation at low power.

## Claims

### Claim 1

A circuit, comprising:
a first node configured to receive a first voltage;
a second node configured to provide electrical supply power for output;
a first voltage regulator coupled to the first node and the second node and configured to provide a first regulated voltage at the second node;
wherein the first voltage regulator is activatable in a first mode of operation for startup during which the first voltage regulator applies to said second node a voltage that increases towards a supply threshold;
a power on reset circuit having an input receiving the voltage at said second node and configured to assert an enable signal when the increase of the voltage at said second node reaches the supply threshold;
a second voltage regulator coupled to the first node and configured to provide a second regulated voltage at a third node, wherein said second voltage regulator is activated in response to assertion of the enable signal; and
control circuitry powered by the second regulated voltage at the third node and configured, when the second voltage regulator is activated, to control a change of the first voltage regulator to a second mode of operation where a regulated voltage higher than said supply threshold is applied to said second node, and further configured, when low-power operation request signal is received, to control a change of the first voltage regulator to a third mode of operation providing low power operation at the second node and to deassert the enable signal to deactivate the second voltage regulator.

### Claim 2 (depends on 1)

The circuit of claim 1, wherein the control circuitry comprises processing circuitry configured to program a value of said regulated voltage higher than said supply threshold.

### Claim 3 (depends on 1)

The circuit of claim 1, wherein the first voltage regulator is configured to:
receive at said first node a voltage in a first voltage range between a lower bound and an upper bound; and
apply to said second node, in said second mode of operation, the regulated voltage higher than said supply threshold in a second voltage range between said supply threshold and a respective upper bound;
wherein said lower bound is higher than said supply threshold and said upper bound is higher than said respective upper bound.

### Claim 4 (depends on 3)

The circuit of claim 3, wherein said lower bound is approximately, 2.5V and said upper bound is approximately 4.5V.

### Claim 5 (depends on 3)

The circuit of claim 3, wherein said supply threshold is approximately 1.8V and said upper bound is approximately 3.3V.

### Claim 6 (depends on 1)

The circuit of claim 1, wherein: the first voltage regulator includes first regulator circuitry configured to provide full-power operation and second regulator circuitry configured to provide low-power operation.

### Claim 7 (depends on 6)

The circuit of claim 6, wherein the voltage regulator is configured to transition from said third mode of operation mode back to said second mode of operation in response to receipt of a wake-up signal.

### Claim 8 (depends on 1)

The circuit of claim 1, wherein the first voltage regulator is activatable in said first mode of operation in response to a supply source being coupled to the first node.

### Claim 9 (depends on 1)

The circuit of claim 1, wherein the first voltage regulator comprises a Low Drop-Out (LDO) regulator and the control circuitry comprises a microcontroller unit.

### Claim 10

A system, comprising:
an electrically powered device; and
a circuit including:
a first node configured to receive a first voltage;
a second node coupled to provide electrical supply power to said electrically powered device;
a first voltage regulator coupled to the first node and the second node and configured to provide a first regulated voltage at the second node;
wherein the first voltage regulator is activatable in a first mode of operation for startup during which the first voltage regulator applies to said second node a voltage that increases towards a supply threshold;
a power on reset circuit having an input receiving the voltage at said second node and configured to assert an enable signal when the increase of the voltage at said second node reaches the supply threshold;
a second voltage regulator coupled to the first node and configured to provide a second regulated voltage at a third node, wherein said second voltage regulator is activated in response to assertion of the enable signal; and
control circuitry powered by the second regulated voltage at the third node;
wherein the control circuitry is configured, when the second voltage regulator is activated, to control a change of the first voltage regulator to a second mode of operation where a regulated voltage higher than said supply threshold is applied to said second node, and further configured, when low-power operation request signal is received, to control a change of the first voltage regulator to a third mode of operation providing low power operation at the second node and to deassert the enable signal to deactivate the second voltage regulator.

### Claim 11 (depends on 10)

The system of claim 10, wherein the circuit is configured for communication with said electrically powered device.

### Claim 12 (depends on 11)

The system of claim 11, wherein the electrically powered device is a memory.

### Claim 13 (depends on 10)

The system of claim 10, wherein the first voltage regulator is activated in said first mode of operation in response to a supply source being coupled to said first node.

### Claim 14 (depends on 10)

The system of claim 10, wherein the control circuitry comprises processing circuitry configured to program a value of said regulated voltage higher than said supply threshold.

### Claim 15 (depends on 10)

The system of claim 10, wherein the first voltage regulator is configured to:
receive at said first node a voltage in a first voltage range between a lower bound and an upper bound; and
apply to said second node, in said second mode of operation, the regulated voltage higher than said supply threshold in a second voltage range between said supply threshold and a respective upper bound;
wherein said lower bound is higher than said supply threshold and said upper bound is higher than said respective upper bound.

### Claim 16 (depends on 10)

The circuit of claim 10, wherein: the first voltage regulator includes first regulator circuitry configured to provide full-power operation and second regulator circuitry configured to provide low-power operation.

### Claim 17 (depends on 16)

The circuit of claim 16, wherein the voltage regulator is configured to transition from said third mode of operation mode back to said second mode of operation in response to receipt of a wake-up signal.

### Claim 18 (depends on 10)

The circuit of claim 10, wherein the first voltage regulator comprises a Low Drop-Out (LDO) regulator and the control circuitry comprises a microcontroller unit.
