# US 11,906,610 B2 · Offset calibration and diagnostics for resistance-based bridge circuits > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,906,610 B2 - Document ID: US11906610B2 - Status: Granted - Kind: B2 - Application number: 17/197,789 - Filed: 2021-03-10 - Published: 2022-09-15 - Granted: 2024-02-20 - Earliest claimed: 2021-03-10 - Assignees: Honeywell International Inc. - Applicants: Honeywell International Inc. - Inventors: Ian Bentley; Richard Bishop; Richard Kirkpatrick - Web page: https://patentgrep.com/patent/US11906610B2 ## CPC - G01D 3/08: with provision for safeguarding the apparatus, e.g. against abnormal operation, against breakdown - G01R 35/007: {Standards or reference devices, e.g. voltage or resistance standards, "golden references"} - G01F 25/13: {using a reference counter} - G01L 27/005: {Apparatus for calibrating pressure sensors} - G01N 27/82: for investigating the presence of flaws - G01R 17/105: {for measuring impedance or resistance} - G01R 31/54: Testing for continuity - G01D: MEASURING NOT SPECIALLY ADAPTED FOR A SPECIFIC VARIABLE; ARRANGEMENTS FOR MEASURING TWO OR MORE VARIABLES NOT COVERED IN A SINGLE OTHER SUBCLASS; TARIFF METERING APPARATUS; MEASURING OR TESTING NOT OTHERWISE PROVIDED FOR - G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12) - G01F: MEASURING VOLUME, VOLUME FLOW, MASS FLOW OR LIQUID LEVEL; METERING BY VOLUME - G01L: MEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE (weighing G01G) - G01N: INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES (measuring or testing apparatus or processes other than immunoassay, involving enzymes or microorganisms C12M, C12Q) ## Abstract Methods, apparatuses and systems for providing offset calibration and fault monitoring are disclosed herein. An example controller component may comprise: a resistance-based bridge circuit; a signal conditioning circuit configured to condition an output of the resistance-based bridge circuit; a first diagnostic circuit coupled to the signal conditioning circuit configured to monitor an output of a first branch of the resistance-based bridge circuit; and a second diagnostic circuit coupled to the signal conditioning circuit configured to monitor an output of a second branch of the resistance-based bridge circuit. ## Claims ### Claim 1 A controller component comprising: a resistance-based bridge circuit; a signal conditioning circuit configured to condition an output of the resistance-based bridge circuit; a first diagnostic circuit coupled to the signal conditioning circuit configured to monitor an output of a first branch of the resistance-based bridge circuit; and a second diagnostic circuit coupled to the signal conditioning circuit configured to monitor an output of a second branch of the resistance-based bridge circuit, wherein each of the first diagnostic circuit and the second diagnostic circuit comprises two transistors; and wherein the controller component comprises a level-shifter element configured to translate an electrical signal/output from an analog supply domain to a digital supply domain; and wherein the controller is configured to detect a fault condition and an open connection condition by monitoring output of the first and second diagnostic circuit, wherein each of the first and second diagnostic circuit is configured to pull low, buffer, and invert output voltage to provide active low-fault detection. ### Claim 2 (depends on 1) The controller component of claim 1, wherein the controller component comprises an application-specific integrated circuit (ASIC) or field-programmable gate array (FPGA). ### Claim 3 (depends on 1) The controller component of claim 1, wherein the resistance-based bridge circuit comprises a Wheatstone bridge circuit. ### Claim 4 (depends on 3) The controller component of claim 3, wherein the first branch comprises a first two series arm of the Wheatstone bridge circuit, and the second branch comprises a second two series arm of the Wheatstone bridge circuit. ### Claim 5 (depends on 1) The controller component of claim 1, wherein the controller component is configured as a flow sensing component. ### Claim 6 (depends on 1) The controller component of claim 1, wherein the controller component is configured as a pressure sensing component. ### Claim 7 (depends on 1) The controller component of claim 1, wherein the controller component is configured as a magnetic-based sensing component. ### Claim 8 (depends on 1) The controller component of claim 1, wherein the controller component is configured to detect a fault condition and an open connection condition. ### Claim 9 (depends on 1) The controller component of claim 1, wherein the signal conditioning circuit comprises a current mirror configuration. ### Claim 10 A method for providing offset calibration and detecting fault conditions using a controller component the method comprising: monitoring, by a first diagnostic circuit of the controller component, a first branch of a resistance-based bridge circuit; and monitoring, by a second diagnostic circuit of the controller component, a second branch of the resistance-based bridge circuit, wherein each of the first diagnostic circuit and the second diagnostic circuit comprises two transistors, wherein the first diagnostic circuit and the second diagnostic circuit are electronically coupled to a signal conditioning circuit of the controller component, and the signal conditioning circuit is configured to condition an output of the resistance-based bridge circuit; and wherein the controller component comprises a level-shifter element configured to translate an electrical signal/output from an analog supply domain to a digital supply domain; and wherein the controller is configured to detect a fault condition and an open connection condition by monitoring output of the first and second diagnostic circuit, wherein each of the first and second diagnostic circuit is configured to pull low, buffer, and invert output voltage to provide active low-fault detection. ### Claim 11 (depends on 10) The method of claim 10, wherein the controller component comprises an ASIC or field-programmable gate array FPGA. ### Claim 12 (depends on 10) The method of claim 10, wherein the resistance-based bridge circuit comprises a Wheatstone bridge circuit. ### Claim 13 (depends on 12) The method of claim 12, wherein the first branch comprises a first two series arm of the Wheatstone bridge circuit, and the second branch comprises a second two series arm of the Wheatstone bridge circuit. ### Claim 14 (depends on 10) The method of claim 10, wherein the controller component is configured as a flow sensing component. ### Claim 15 (depends on 10) The method of claim 10, wherein the controller component is configured as a pressure sensing component. ### Claim 16 (depends on 10) The method of claim 10, wherein the controller component is configured as a magnetic-based sensing component. ### Claim 17 (depends on 10) The method of claim 10, wherein the controller component is configured to detect a fault condition and an open connection condition. ### Claim 18 (depends on 10) The method of claim 10, wherein the signal conditioning circuit comprises a current mirror configuration.