# US 11,906,569 B2 · Semiconductor wafer evaluation apparatus and semiconductor wafer manufacturing method

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- Number: US 11,906,569 B2
- Document ID: US11906569B2
- Status: Granted
- Kind: B2
- Application number: 17/519,679
- Filed: 2021-11-05
- Published: 2022-05-12
- Granted: 2024-02-20
- Earliest claimed: 2020-11-06
- Assignees: Showa Denko K.K.
- Applicants: Showa Denko K.K.
- Inventors: Koichi Murata; Isaho Kamata; Hidekazu Tsuchida; Akira Miyasaka
- Web page: https://patentgrep.com/patent/US11906569B2

## CPC

- G01R 31/2601: {Apparatus or methods therefor (G01R31/2607, G01R31/2642 take precedence)}
- C23C 16/325: {Silicon carbide}
- C23C 16/52: Controlling or regulating the coating process {(C23C16/45557, C23C16/279 take precedence)}
- C30B 25/16: Controlling or regulating (controlling or regulating in general G05)
- C30B 29/36: Carbides
- G01R 1/06783: {containing liquids}
- G01R 31/2648: {Characterising semiconductor materials (testing of materials or semi-finished products G01R31/2831; testing during manufacture H10P74/00)}
- G01R 31/2656: {using non-ionising electromagnetic radiation, e.g. optical radiation}
- H10P 74/203: {Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects}
- H10P 74/23: {characterised by multiple measurements, corrections, marking or sorting processes}
- C30B 35/00: Apparatus not otherwise provided for, specially adapted for the growth, production or after-treatment of single crystals or of a homogeneous polycrystalline material with defined structure
- G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12)
- C23C: COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL (making metal-coated products by extrusion B21C23/22; covering with metal by connecting pre-existing layers to articles, see the relevant places, e.g. B21D39/00, B23K; metallising of glass C03C; metallising mortars, concrete, artificial stone, ceramics or natural stone C04B41/00; enamelling of, or applying a vitreous layer to, metals C23D; treating metal surfaces or coating of metals by electrolysis or electrophoresis C25D; single-crystal film growth C30B; by metallising textiles D06M11/83; decorating textiles by locally metallising D06Q1/04)
- C30B: SINGLE-CRYSTAL GROWTH (by using ultra-high pressure, e.g. for the formation of diamonds, B01J3/06); UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL (zone-refining of metals or alloys C22B); PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE (casting of metals, casting of other substances by the same processes or devices B22D; working of plastics B29; modifying the physical structure of metals or alloys C21D, C22F); SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE (for producing semiconductor devices or parts thereof H10); APPARATUS THEREFOR
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor wafer evaluation apparatus brings a contact maker (mercury liquefied at room temperature), as a Schottky electrode, into contact with a semiconductor wafer, intermittently applies a voltage from a pulse power supply, and evaluates the state (kinds, density) of point defects by an evaluation means based on the status of the electrostatic capacity of the semiconductor wafer. In this manner, the state (kinds, density) of the point defects in the plane of a large-diameter semiconductor wafer is directly evaluated using a large table.

## Claims

### Claim 1

A semiconductor wafer evaluation apparatus, comprising:
a contact maker where a metal (Schottky electrode) liquefied at room temperature makes contact with a semiconductor wafer as an object to be evaluated;
power supply means for applying a voltage to the contact maker via means for compensating for parasitic inductance and parasitic capacity;
application control means for intermittently establishing an applied state of the voltage from the power supply means; and
evaluation means for evaluating a state of point defects of the semiconductor wafer based on a status of an electrostatic capacity of the semiconductor wafer during intermittent application of the voltage by the application control means,
wherein
the application control means has a function of varying the applied voltage, and
the evaluation means evaluates the state of the point defects at a location deep in a depth direction when the applied voltage is raised.

### Claim 2 (depends on 1)

The semiconductor wafer evaluation apparatus according to claim 1, wherein
the metal liquefied at room temperature is mercury.

### Claim 3 (depends on 1)

The semiconductor wafer evaluation apparatus according to claim 1, wherein
the point defects are defects whose signals peak at a temperature near room temperature,
the state of the point defects is kinds and a density of the point defects.

### Claim 4 (depends on 1)

The semiconductor wafer evaluation apparatus according to claim 1, further comprising:
moving means for moving the contact maker relatively in a range of a diameter of 150 mm or more with respect to a planar direction of the semiconductor wafer.

### Claim 5 (depends on 1)

The semiconductor wafer evaluation apparatus according to claim 1, further comprising
photoirradiation means for performing irradiation with light having energy equal to or higher than a bandgap of the semiconductor wafer, and
wherein the evaluation means evaluates the defects by minority carrier transient spectroscopy.

### Claim 6 (depends on 1)

The semiconductor wafer evaluation apparatus according to claim 1, wherein
the semiconductor wafer is a SiC single crystal.

### Claim 7 (depends on 6)

The semiconductor wafer evaluation apparatus according to claim 6, wherein
the point defects in the SiC single crystal are 2112 centers ascribed to carbon vacancies.

### Claim 8 (depends on 1)

A semiconductor wafer manufacturing method, comprising:
adjusting and controlling conditions for film formation by semiconductor manufacturing means based on information on the point defects, which has been obtained using the semiconductor wafer evaluation apparatus according to claim 1, thereby manufacturing a semiconductor wafer.

### Claim 9

A semiconductor wafer evaluation apparatus, comprising: a contact maker where a metal (Schottky electrode) liquefied at room temperature makes contact with a semiconductor wafer as an object to be evaluated; power supply means for applying a voltage to the contact maker via means for compensating for parasitic inductance and parasitic capacity; application control means for intermittently establishing an applied state of the voltage from the power supply means; evaluation means for evaluating a state of point defects of the semiconductor wafer based on a status of an electrostatic capacity of the semiconductor wafer during intermittent application of the voltage by the application control means; and photoirradiation means for performing irradiation with light having energy equal to or higher than a bandgap of the semiconductor wafer, and wherein the evaluation means evaluates the defects by minority carrier transient spectroscopy.

### Claim 10 (depends on 9)

The semiconductor wafer evaluation apparatus according to claim 9, wherein
the metal liquefied at room temperature is mercury.

### Claim 11 (depends on 9)

The semiconductor wafer evaluation apparatus according to claim 9, wherein
the point defects are defects whose signals peak at a temperature near room temperature, and
the state of the point defects is kinds and a density of the point defects.

### Claim 12 (depends on 9)

The semiconductor wafer evaluation apparatus according to claim 9, further comprising:
moving means for moving the contact maker relatively in a range of a diameter of 150 mm or more with respect to a planar direction of the semiconductor wafer.

### Claim 13 (depends on 9)

The semiconductor wafer evaluation apparatus according to claim 9, wherein
the application control means has a function of varying the applied voltage, and
the evaluation means evaluates the state of the point defects at a location deep in a depth direction when the applied voltage is raised.

### Claim 14 (depends on 9)

The semiconductor wafer evaluation apparatus according to claim 9, wherein
the semiconductor wafer is a SiC single crystal.

### Claim 15 (depends on 14)

The semiconductor wafer evaluation apparatus according to claim 14, wherein
the point defects in the SiC single crystal are 2112 centers ascribed to carbon vacancies.
