Sidewall structures for memory cells in vertical structures

An apparatus, comprising:

• a substrate defining a plane in a first direction and a second direction, and extending in a third direction orthogonal to the plane;
• a first electrode;
• a second electrode;
• and
• a self-selecting storage element extending between the first electrode and the second electrode in the first direction parallel with the plane of the substrate, wherein the self-selecting storage element comprises a bulk region comprising a chalcogenide material having a first composition and a sidewall region comprising the chalcogenide material having a second composition that is different than the first composition, at least a portion of the sidewall region extending between the first electrode and the second electrode in the first direction, wherein:
• a first portion of the sidewall region extends along a first side of the self-selecting storage element that is in contact with a first dielectric material,
• a second portion of the sidewall region extends along a second side of the self-selecting storage element that is in contact with a second dielectric material, the second side of the self-selecting storage element being opposite the first side of the self-selecting storage element,
• a third portion of the sidewall region extends along a third side of the self-selecting storage element, and
• a fourth portion of the sidewall region extends along a fourth side of the self-selecting storage element, the third side of the self-selecting storage element being opposite the fourth side of the self-selecting storage element.

An apparatus, comprising:

• a memory array comprising a plurality of memory cells, each memory cell of the plurality of memory cells comprising:
• a first electrode;
• a second electrode;
• and
• a self-selecting storage element extending between the first electrode and the second electrode in a first direction parallel to a plane defined by a substrate, wherein the self-selecting storage element comprises a bulk region comprising a chalcogenide material having a first composition and a sidewall region comprising the chalcogenide material having a second composition that is different than the first composition, at least a portion of the sidewall region extending between the first electrode and the second electrode in the first direction, wherein a first concentration of one or more components in the first composition of the chalcogenide material is between two and twenty percent different than a second concentration of the one or more components in the second composition;
• and
• a controller coupled with the memory array and configured to program a state of the plurality of memory cells by applying voltages across the plurality of memory cells.