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US 11,903,221 B2Granted
Three dimensional semiconductor device with memory stack
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChenchen Wang, Chun-Chieh Lu, Chi On Chui, Yu-Ming Lin, Sai-Hooi Yeong
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Abstract
A device includes a first transistor over a substrate, a second transistor disposed over the first transistor, and a memory element disposed over the second transistor. The second transistor includes a channel layer, a gate dielectric layer surrounding a sidewall of the channel layer, and a gate electrode surrounding a sidewall of the gate dielectric layer.
Claims20
A semiconductor device comprising:
- a first transistor disposed over a substrate;
- a conductive line disposed over the first transistor;
- a memory cell disposed over the conductive line, the memory cell including:
- a second transistor, wherein the second transistor comprises:
- a channel layer;
- a gate dielectric layer surrounding a sidewall of the channel layer;
- and
- a gate electrode surrounding a sidewall of the gate dielectric layer;
- and
- a memory element disposed over the second transistor, wherein the second transistor is vertically interjacent the conductive line and the memory element, and wherein the memory element is vertically interjacent the second transistor and a bit line of the memory cell.
7 more elements
A semiconductor device comprising:
- a substrate;
- a first transistor array over the substrate;
- a first insulating layer covering the first transistor array;
- a second transistor array disposed over the first insulating layer, wherein a transistor of the second transistor array comprises:
- a first channel layer;
- a first gate dielectric layer surrounding a sidewall of the first channel layer;
- and
- a first gate electrode surrounding a sidewall of the first gate dielectric layer;
- and
- a first memory element having a first electrode disposed over and electrically connected to the second transistor;
- and
- a bit line disposed over and electrically connected to a second electrode of the memory element.
9 more elements
A semiconductor device, comprising:
- a first transistor disposed over a substrate;
- a second transistor disposed over the first transistor, wherein the second transistor comprises:
- a columnar channel layer;
- a gate dielectric layer surrounding the columnar channel layer;
- a gate electrode layer surrounding the gate dielectric layer;
- and
- a memory element over, vertically overlapping, and contacting the second transistor at a first contact point, the memory element also contacting a bit line at a second contact point, the second contact point being over and vertically overlapping the first contact point.
4 more elements
Dependencies are inferred from the claim text.